From patchwork Mon Jan 7 13:08:43 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [U-Boot,1/4,V2] EXYNOS: Add functions for power initialisation Date: Mon, 07 Jan 2013 03:08:43 -0000 From: Rajeshwari Shinde X-Patchwork-Id: 209912 Message-Id: <1357564126-13275-2-git-send-email-rajeshwari.s@samsung.com> To: u-boot@lists.denx.de Cc: kmpark@infradead.org, patches@linaro.org This patch adds functions to intialsise power registers during spl boot. Signed-off-by: Rajeshwari Shinde --- Changes in V2: - Moved from second patch to first patch - Renamed ps_hold_setup to power_ps_hold_setup - Added explanation before each power function definition arch/arm/cpu/armv7/exynos/power.c | 27 +++++++++++++++++++++++++++ arch/arm/include/asm/arch-exynos/power.h | 10 ++++++++++ 2 files changed, 37 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/power.c b/arch/arm/cpu/armv7/exynos/power.c index d4bce6d..f0c107c 100644 --- a/arch/arm/cpu/armv7/exynos/power.c +++ b/arch/arm/cpu/armv7/exynos/power.c @@ -95,3 +95,30 @@ void set_dp_phy_ctrl(unsigned int enable) if (cpu_is_exynos5()) exynos5_dp_phy_control(enable); } + +uint32_t power_read_reset_status(void) +{ + struct exynos5_power *power = + (struct exynos5_power *)samsung_get_base_power(); + + return power->inform1; +} + +void power_ps_hold_setup(void) +{ + struct exynos5_power *power = + (struct exynos5_power *)samsung_get_base_power(); + + /* Set PS-Hold high */ + setbits_le32(&power->ps_hold_control, + EXYNOS_PS_HOLD_CONTROL_DATA_HIGH); +} + +void power_exit_wakeup(void) +{ + struct exynos5_power *power = + (struct exynos5_power *)samsung_get_base_power(); + typedef void (*resume_func)(void); + + ((resume_func)power->inform0)(); +} diff --git a/arch/arm/include/asm/arch-exynos/power.h b/arch/arm/include/asm/arch-exynos/power.h index d2fdb59..f6d0278 100644 --- a/arch/arm/include/asm/arch-exynos/power.h +++ b/arch/arm/include/asm/arch-exynos/power.h @@ -864,4 +864,14 @@ void set_dp_phy_ctrl(unsigned int enable); #define EXYNOS_DP_PHY_ENABLE (1 << 0) +#define EXYNOS_PS_HOLD_CONTROL_DATA_HIGH (1 << 8) + +/* Read inform1 to get the reset status */ +uint32_t power_read_reset_status(void); + +/*Set ps_hold data drving value high */ +void power_ps_hold_setup(void); + +/* Read the resume function and call it */ +void power_exit_wakeup(void); #endif