From patchwork Sat Jan 5 00:54:39 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 209584 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id C16F32C0079 for ; Sat, 5 Jan 2013 11:54:59 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5618B4A03B; Sat, 5 Jan 2013 01:54:56 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id XBeg2f-4Q0Oy; Sat, 5 Jan 2013 01:54:56 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DA5534A032; Sat, 5 Jan 2013 01:54:54 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id ED0E44A032 for ; Sat, 5 Jan 2013 01:54:53 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id WyDv6V2ymgo3 for ; Sat, 5 Jan 2013 01:54:53 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-ye0-f170.google.com (mail-ye0-f170.google.com [209.85.213.170]) by theia.denx.de (Postfix) with ESMTPS id 1E8834A02C for ; Sat, 5 Jan 2013 01:54:51 +0100 (CET) Received: by mail-ye0-f170.google.com with SMTP id m12so2724018yen.29 for ; Fri, 04 Jan 2013 16:54:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer; bh=1M3C8hgPeQc1hH5PzfSa5j9rEBSYZEAYcPT4+/8mm1o=; b=nTNweBNjkOvaa0t6/6+Dnyz/Ucbbgveu8mUJhZN1qPPEifb1DFws67olp4T1eWn4I7 VSx7mPZb+xyPv++2qSDTqaU8jpcdz/0kDKQnzi5RKXT6CGQIEthQp5nPhwFe7dHbetRF crxDKZ8TSlPRdfkrg4eUno0oLrOE87y2nOyYkE6RgxskLdWprHVNHqFAP6eWo7+AObzs ljmh6Yr5kWiQUXxk/4UXszolNMmxAB6lQrL5OlLOmlHlQpPMcDEDY9CcQdYDcuNWFbF9 JZbtxZn9Rz++LTtVYD5uboW/po6kckvh5d0nDXVFpfw1+zNsxM/wsTMmfAlKq3OS9lK3 go3g== X-Received: by 10.236.134.72 with SMTP id r48mr58762419yhi.3.1357347289194; Fri, 04 Jan 2013 16:54:49 -0800 (PST) Received: from fabio-Latitude-E6410.cps.virtua.com.br ([189.61.223.46]) by mx.google.com with ESMTPS id k1sm49599696anl.11.2013.01.04.16.54.46 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 04 Jan 2013 16:54:48 -0800 (PST) From: Fabio Estevam To: sbabic@denx.de Date: Fri, 4 Jan 2013 22:54:39 -0200 Message-Id: <1357347279-28508-1-git-send-email-festevam@gmail.com> X-Mailer: git-send-email 1.7.9.5 Cc: Fabio Estevam , dirk.behme@gmail.com, u-boot@lists.denx.de, rob.herring@calxeda.com Subject: [U-Boot] [PATCH v2] mx6: Add workaround for ARM errata X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Fabio Estevam Add workaround for the following ARM errata: 743622 and 751472. The motivation for this change is the following kernel commit 62e4d357a (ARM: 7609/1: disable errata work-arounds which access secure registers), which removes the errata from multiplatform kernel. Since imx has been converted to multiplatform in the kernel, we need to apply such workaround into the bootloader. Workaround code has been taken from arch/arm/mm/proc-v7.S from 3.7.1 kernel. Signed-off-by: Fabio Estevam --- Following patch has been proposed into arm kernel mailing list: http://www.spinics.net/lists/arm-kernel/msg214840.html Changes since v1: - Use the same style of the erratum in arch/arm/cpu/armv7/mx5/lowlevel_init.S. arch/arm/cpu/armv7/mx6/lowlevel_init.S | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/cpu/armv7/mx6/lowlevel_init.S b/arch/arm/cpu/armv7/mx6/lowlevel_init.S index acadef2..ae8141d 100644 --- a/arch/arm/cpu/armv7/mx6/lowlevel_init.S +++ b/arch/arm/cpu/armv7/mx6/lowlevel_init.S @@ -20,6 +20,16 @@ #include +.macro init_arm_errata + mrc 15, 0, r1, c1, c0, 1 /* read diagnostic register */ + /* ARM erratum ID #743622 */ + orr r1, r1, #(1 << 6) /* set bit #6 */ + /* ARM erratum ID #751472 */ + orr r1, r1, #(1 << 11) /* set bit #11 */ + mcr 15, 0, r1, c1, c0, 1 /* write diagnostic register */ +.endm + ENTRY(lowlevel_init) + init_arm_errata mov pc, lr ENDPROC(lowlevel_init)