From patchwork Sat Jan 5 00:29:21 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 209580 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id CA6D32C0086 for ; Sat, 5 Jan 2013 11:29:39 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2F47E4A02F; Sat, 5 Jan 2013 01:29:38 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id lVk7CfkG5e9l; Sat, 5 Jan 2013 01:29:37 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 42F104A032; Sat, 5 Jan 2013 01:29:36 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 27C184A032 for ; Sat, 5 Jan 2013 01:29:34 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id AWVvslHBjeU3 for ; Sat, 5 Jan 2013 01:29:33 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-gh0-f182.google.com (mail-gh0-f182.google.com [209.85.160.182]) by theia.denx.de (Postfix) with ESMTPS id 29D5D4A02F for ; Sat, 5 Jan 2013 01:29:32 +0100 (CET) Received: by mail-gh0-f182.google.com with SMTP id z15so2102295ghb.27 for ; Fri, 04 Jan 2013 16:29:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer; bh=FbxSVPLk6yO3CudrBuVJuxU9LyyDuYnkcnOTaaM5iWc=; b=oe2w7uF+UgLCWEJpoLLkDUZ7hywQVtUbLutpne/Wee4pA2V69KlNCpmjuBWewMm/6X vPUs8IcmPs+kpuxxVIIhi80ToKJzUbayS0LlwMzAGi/HcY6L9hwD/DVIL7prAyxAByhw wCJGTDxj89ybkVd/LNAc4U/yvaH67G+YQ5dYpiCwRFODEAIkNuFISGN1lj/MU/cB995H XIG+VtBhMlIJF0uShIgMoHu9vgg5BuhNKtjj3fLo5Hrpm/Q/8oQ3oewgbudek8qMFx0K ToLQyLsKUAsFQX9py1V2+vmm/qBrmdDjOJotKeNUGmT4zlAHb5UdgmUqW9LZQWdA056w mq/w== X-Received: by 10.236.147.208 with SMTP id t56mr56639327yhj.88.1357345770986; Fri, 04 Jan 2013 16:29:30 -0800 (PST) Received: from fabio-Latitude-E6410.cps.virtua.com.br ([189.61.223.46]) by mx.google.com with ESMTPS id p17sm49492109anh.12.2013.01.04.16.29.27 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 04 Jan 2013 16:29:29 -0800 (PST) From: Fabio Estevam To: sbabic@denx.de Date: Fri, 4 Jan 2013 22:29:21 -0200 Message-Id: <1357345761-26969-1-git-send-email-festevam@gmail.com> X-Mailer: git-send-email 1.7.9.5 Cc: Fabio Estevam , dirk.behme@gmail.com, u-boot@lists.denx.de, rob.herring@calxeda.com Subject: [U-Boot] [PATCH] mx6: Add workaround for ARM errata X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Fabio Estevam Add workaround for the following ARM errata: 743622 and 751472. The motivation for this change is the following kernel commit 62e4d357a (ARM: 7609/1: disable errata work-arounds which access secure registers), which removes the errata from multiplatform kernel. Since imx has been converted to multiplatform in the kernel, we need to apply such workaround into the bootloader. Workaround code has been taken from arch/arm/mm/proc-v7.S from 3.7.1 kernel. Signed-off-by: Fabio Estevam --- Following patch has been proposed into arm kernel mailing list: http://www.spinics.net/lists/arm-kernel/msg214840.html arch/arm/cpu/armv7/mx6/lowlevel_init.S | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/cpu/armv7/mx6/lowlevel_init.S b/arch/arm/cpu/armv7/mx6/lowlevel_init.S index acadef2..bf06152 100644 --- a/arch/arm/cpu/armv7/mx6/lowlevel_init.S +++ b/arch/arm/cpu/armv7/mx6/lowlevel_init.S @@ -20,6 +20,16 @@ #include +.macro init_arm_errata + /* ARM erratum ID #743622 */ + mrceq p15, 0, r10, c15, c0, 1 /* read diagnostic register */ + orreq r10, r10, #1 << 6 /* set bit #6 */ + /* ARM erratum ID #751472 */ + orrlt r10, r10, #1 << 11 /* set bit #11 */ + mcrlt p15, 0, r10, c15, c0, 1 /* write diagnostic register */ +.endm + ENTRY(lowlevel_init) + init_arm_errata mov pc, lr ENDPROC(lowlevel_init)