Patchwork RFA: RL78: Correct values of the MDBL and MDBH registers

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Submitter Nick Clifton
Date Jan. 3, 2013, 12:54 p.m.
Message ID <87623e1l5v.fsf@redhat.com>
Download mbox | patch
Permalink /patch/209243/
State New
Headers show

Comments

Nick Clifton - Jan. 3, 2013, 12:54 p.m.
Hi DJ,

  There is a error in the RL78 G13 hardware manual.  Section 14, Figure
  14-3 lists the values of the MDBL registers as FFFF4H, FFFF5H and the
  MDBH registers as FFFF6H, FFFF7H.  This is incorrect.  The correct
  values are shown in Section 3, Table 3-5: MDBL => FFFF6H, FFFF7H,
  MDBH => FFFF4H, FFFF5H.

  GCC and the RL78 simulator currently use the values from section 14.
  The patch below corrects GCC.  A similar patch will be submitted to
  update the sim.

  Tested with no regressions (on an updated sim) using an rl78-elf
  toolchain.  OK to apply ?
  
Cheers
  Nick
  
gcc/ChangeLog
2013-01-03  Nick Clifton  <nickc@redhat.com>

	* config/rl78/rl78.md (mulsi3_g13): Correct values for MDBL and
	MDBH registers.
DJ Delorie - Jan. 7, 2013, 8:47 p.m.
I did notice that the hardware didn't work the same way as the
documentation... this would explain it.  Yes, please apply it :-)

Patch

Index: gcc/config/rl78/rl78.md
===================================================================
--- gcc/config/rl78/rl78.md	(revision 194833)
+++ gcc/config/rl78/rl78.md	(working copy)
@@ -273,10 +273,10 @@ 
   )
 
 ;; 0xFFFF0 is MDAL.  0xFFFF2 is MDAH.
-;; 0xFFFF4 is MDBL.  0xFFFF6 is MDBH.
+;; 0xFFFF6 is MDBL.  0xFFFF4 is MDBH.
 ;; 0xF00E0 is MDCL.  0xF00E2 is MDCH.
 ;; 0xF00E8 is MDUC.
-;; Warning: this matches the documentation, not the silicon.
+;; Warning: this matches the silicon not the documentation.
 (define_insn "mulsi3_g13"
   [(set (match_operand:SI          0 "register_operand" "=&v")
 	(mult:SI (match_operand:SI 1 "nonmemory_operand" "vi")
@@ -291,12 +291,12 @@ 
 	movw	ax, %h2
 	movw	0xffff2, ax	; MDAH
 	nop	; mdb = mdal * mdah
-	movw	ax, 0xffff4	; MDBL
+	movw	ax, 0xffff6	; MDBL
 	movw	%h0, ax
 
 	mov	a, #0x40
 	mov	!0xf00e8, a	; MDUC
-	movw	ax, 0xffff6	; MDBH
+	movw	ax, 0xffff4	; MDBH
 	movw	!0xf00e0, ax	; MDCL
 	movw	ax, #0
 	movw	!0xf00e2, ax	; MDCL