Patchwork [U-Boot,1/2] EXYNOS: EXYNOS5250: add exynos5250 register addresses

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Submitter Donghwa Lee
Date Jan. 3, 2013, 8:43 a.m.
Message ID <50E544A7.2010508@samsung.com>
Download mbox | patch
Permalink /patch/209196/
State Superseded
Delegated to: Minkyu Kang
Headers show

Comments

Donghwa Lee - Jan. 3, 2013, 8:43 a.m.
This patch add exynos5250 register addresses.
Exynos5xxx series has each different register, so it is needed to separate.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
  arch/arm/include/asm/arch-exynos/cpu.h |   33 
++++++++++++++++++++++++++++++++
  1 files changed, 33 insertions(+), 0 deletions(-)

      return 0;                        \

Patch

diff --git a/arch/arm/include/asm/arch-exynos/cpu.h 
b/arch/arm/include/asm/arch-exynos/cpu.h
index eb34422..0b382be 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -130,6 +130,37 @@ 
  #define EXYNOS5_ADC_BASE        DEVICE_NOT_AVAILABLE
  #define EXYNOS5_MODEM_BASE        DEVICE_NOT_AVAILABLE

+#define EXYNOS5250_GPIO_PART4_BASE    0x03860000
+#define EXYNOS5250_PRO_ID        0x10000000
+#define EXYNOS5250_CLOCK_BASE        0x10010000
+#define EXYNOS5250_POWER_BASE        0x10040000
+#define EXYNOS5250_SWRESET        0x10040400
+#define EXYNOS5250_SYSREG_BASE        0x10050000
+#define EXYNOS5250_WATCHDOG_BASE    0x101D0000
+#define EXYNOS5250_DMC_PHY0_BASE    0x10C00000
+#define EXYNOS5250_DMC_PHY1_BASE    0x10C10000
+#define EXYNOS5250_GPIO_PART3_BASE    0x10D10000
+#define EXYNOS5250_DMC_CTRL_BASE    0x10DD0000
+#define EXYNOS5250_GPIO_PART1_BASE    0x11400000
+#define EXYNOS5250_MIPI_DSIM_BASE    0x11D00000
+#define EXYNOS5250_USB_HOST_EHCI_BASE    0x12110000
+#define EXYNOS5250_USBPHY_BASE        0x12130000
+#define EXYNOS5250_USBOTG_BASE        0x12140000
+#define EXYNOS5250_MMC_BASE        0x12200000
+#define EXYNOS5250_SROMC_BASE        0x12250000
+#define EXYNOS5250_UART_BASE        0x12C00000
+#define EXYNOS5250_I2C_BASE        0x12C60000
+#define EXYNOS5250_SPI_BASE        0x12D20000
+#define EXYNOS5250_I2S_BASE        0x12D60000
+#define EXYNOS5250_PWMTIMER_BASE    0x12DD0000
+#define EXYNOS5250_SPI_ISP_BASE        0x131A0000
+#define EXYNOS5250_GPIO_PART2_BASE    0x13400000
+#define EXYNOS5250_FIMD_BASE        0x14400000
+#define EXYNOS5250_DP_BASE        0x145B0000
+
+#define EXYNOS5250_ADC_BASE        DEVICE_NOT_AVAILABLE
+#define EXYNOS5250_MODEM_BASE        DEVICE_NOT_AVAILABLE
+
  #ifndef __ASSEMBLY__
  #include <asm/io.h>
  /* CPU detection macros */
@@ -198,6 +229,8 @@  static inline unsigned int 
samsung_get_base_##device(void)    \
              return EXYNOS4X12_##base;        \
          return EXYNOS4_##base;                \
      } else if (cpu_is_exynos5()) {                \
+        if (proid_is_exynos5250())            \
+            return EXYNOS5250_##base;        \
          return EXYNOS5_##base;                \
      }                            \