From patchwork Thu Jan 3 08:43:21 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Donghwa Lee X-Patchwork-Id: 209195 X-Patchwork-Delegate: promsoft@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 78FA22C008C for ; Thu, 3 Jan 2013 19:43:45 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BA3B54A048; Thu, 3 Jan 2013 09:43:41 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 5L3jX9iWjTej; Thu, 3 Jan 2013 09:43:41 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 469314A04A; Thu, 3 Jan 2013 09:43:39 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 658364A048 for ; Thu, 3 Jan 2013 09:43:31 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id xcb-gq3wxbJH for ; Thu, 3 Jan 2013 09:43:30 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mailout2.samsung.com (mailout2.samsung.com [203.254.224.25]) by theia.denx.de (Postfix) with ESMTP id A9B894A04B for ; Thu, 3 Jan 2013 09:43:27 +0100 (CET) Received: from epcpsbgm2.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MG100NAPK863BQ0@mailout2.samsung.com> for u-boot@lists.denx.de; Thu, 03 Jan 2013 17:43:21 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [203.254.230.45]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 7A.39.12699.9A445E05; Thu, 03 Jan 2013 17:43:21 +0900 (KST) X-AuditID: cbfee61b-b7f616d00000319b-f0-50e544a91765 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 3A.39.12699.9A445E05; Thu, 03 Jan 2013 17:43:21 +0900 (KST) Received: from [10.90.51.49] by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MG1009HIK89P590@mmp1.samsung.com> for u-boot@lists.denx.de; Thu, 03 Jan 2013 17:43:21 +0900 (KST) Message-id: <50E544A9.4000107@samsung.com> Date: Thu, 03 Jan 2013 17:43:21 +0900 From: Donghwa Lee User-Agent: Mozilla/5.0 (X11; Linux i686; rv:16.0) Gecko/20121011 Thunderbird/16.0.1 MIME-version: 1.0 To: u-boot@lists.denx.de, Minkyu Kang , 'Kyungmin Park' , dh09.lee@samsung.com DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpgkeLIzCtJLcpLzFFi42I5/e+Zru5Kl6cBBov3yFu83dvJ7sDocfbO DsYAxigum5TUnMyy1CJ9uwSujG3HDjEXrJevaHt/gb2B8apEFyMnh4SAicT+lnOsELaYxIV7 69m6GLk4hASWMUo8+LSGDabo/rzpYEVCAosYJT6eqYMoamKSmPa5DayIV0BL4vGZXkYQm0VA VeLLliNgDWwCGhKn791n72Lk4BAVCJPYuTkdolxQ4sfkeywgc0QEGhkl7qx/AtYrLOAlMens L3YQm1nAWmLlpG2MELa8xOY1b5kh5gtIfJt8iAVkpoSArMSmA8wgcyQEHrNJ/D63gAniaEmJ gytusExgFJ6FZN8sJGNnIRm7gJF5FaNoakFyQXFSeq6RXnFibnFpXrpecn7uJkZIMEvvYFzV YHGIUYCDUYmHl7H+SYAQa2JZcWXuIUYJDmYlEd7rOUAh3pTEyqrUovz4otKc1OJDjD5A105k lhJNzgdGWl5JvKGxgbGhoaWhmamlqQEOYSVxXsZTQLME0hNLUrNTUwtSi2DGMXFwSjUwlrx9 xnvmKIf3lJZ7vezRcwN3XOaq6ZcMupWxb7NyhtAa1uzv58VnTTU/LTRxztfb6iExXVM3LvvJ Z3zx7dp3IRq/paL/83QIONWJvWReu2fBudrQ+ocJZ7bOUTNc+Scn7POLxksmHC8jZjod//1t iqQsV0exW8ep5JlTHHrSOQM5Fi+p++DwWImlOCPRUIu5qDgRAPw51w6TAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrPIsWRmVeSWpSXmKPExsVy+t9jAd2VLk8DDN7NkbJ4u7eT3YHR4+yd HYwBjFENjDYZqYkpqUUKqXnJ+SmZeem2St7B8c7xpmYGhrqGlhbmSgp5ibmptkouPgG6bpk5 QGOVFMoSc0qBQgGJxcVK+naYJoSGuOlawDRG6PqGBMH1GBmggYR1jBnbjh1iLlgvX9H2/gJ7 A+NViS5GTg4JAROJ+/Oms0LYYhIX7q1nA7GFBBYxSnw8U9fFyAVkNzFJTPvcBpbgFdCSeHym lxHEZhFQlfiy5QhYM5uAhsTpe/fZuxg5OEQFwiR2bk6HKBeU+DH5HgvIHBGBRkaJO+ufgPUK C3hJTDr7ix3EZhawllg5aRsjhC0vsXnNW+YJjLyzkPTPQlI2C0nZAkbmVYyiqQXJBcVJ6blG esWJucWleel6yfm5mxjBsfJMegfjqgaLQ4wCHIxKPLyM9U8ChFgTy4orcw8xSnAwK4nwXs8B CvGmJFZWpRblxxeV5qQWH2L0AfpuIrOUaHI+MI7zSuINjU3MjCyNzIxNzI2NcQgrifMyngKa JZCeWJKanZpakFoEM46Jg1OqgVGvI/Oti4jw86JOh6zUKUWpelHdbHFGz1oOvuay7AlctXF7 mKBIhvhVjmkp7x7Zx6VeOnqn9hfbgfOn9/pWTj0iOWOly+2+lbfXpi+WdZnRvj/blP+S1c/j M/2vXz5tPKMuvujekiN/m/2WxSzosI0O4AqV+3PBif/DnciMTsmTJ9ZwqwXG1yqxFGckGmox FxUnAgDOZlqfwgIAAA== X-CFilter-Loop: Reflected Subject: [U-Boot] [PATCH 2/2] EXYNOS: EXYNOS5250: add gpio structure for EXYNOS5250 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This patch add gpio structure of exynos5250. Exynos5xxx series has each different gpio bank, so it is needed to separate. After separation task, useless variables will be removed. Signed-off-by: Donghwa Lee Signed-off-by: Kyungmin Park --- arch/arm/include/asm/arch-exynos/gpio.h | 80 +++++++++++++++++++++++++++++++ 1 files changed, 80 insertions(+), 0 deletions(-) int en); @@ -272,6 +328,30 @@ void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode); - EXYNOS5_GPIO_PART3_BASE) / sizeof(struct s5p_gpio_bank)) \ * GPIO_PER_BANK) + pin) + EXYNOS5_GPIO_PART2_MAX) +#define exynos5250_gpio_part1_get_nr(bank, pin) \ + ((((((unsigned int) &(((struct exynos5250_gpio_part1 *) \ + EXYNOS5250_GPIO_PART1_BASE)->bank)) \ + - EXYNOS5250_GPIO_PART1_BASE) / sizeof(struct s5p_gpio_bank)) \ + * GPIO_PER_BANK) + pin) + +#define EXYNOS5250_GPIO_PART1_MAX ((sizeof(struct exynos5250_gpio_part1) \ + / sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK) + +#define exynos5250_gpio_part2_get_nr(bank, pin) \ + (((((((unsigned int) &(((struct exynos5250_gpio_part2 *) \ + EXYNOS5250_GPIO_PART2_BASE)->bank)) \ + - EXYNOS52590_GPIO_PART2_BASE) / sizeof(struct s5p_gpio_bank)) \ + * GPIO_PER_BANK) + pin) + EXYNOS5250_GPIO_PART1_MAX) + +#define EXYNOS5250_GPIO_PART2_MAX ((sizeof(struct exynos5250_gpio_part2) \ + / sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK) + +#define exynos5250_gpio_part3_get_nr(bank, pin) \ + (((((((unsigned int) &(((struct exynos5250_gpio_part3 *) \ + EXYNOS5250_GPIO_PART3_BASE)->bank)) \ + - EXYNOS5250_GPIO_PART3_BASE) / sizeof(struct s5p_gpio_bank)) \ + * GPIO_PER_BANK) + pin) + EXYNOS5250_GPIO_PART2_MAX) + static inline unsigned int s5p_gpio_base(int nr) { if (cpu_is_exynos5()) { diff --git a/arch/arm/include/asm/arch-exynos/gpio.h b/arch/arm/include/asm/arch-exynos/gpio.h index cfe1024..be84b87 100644 --- a/arch/arm/include/asm/arch-exynos/gpio.h +++ b/arch/arm/include/asm/arch-exynos/gpio.h @@ -196,6 +196,62 @@ struct exynos5_gpio_part4 { struct s5p_gpio_bank z; }; +struct exynos5250_gpio_part1 { + struct s5p_gpio_bank a0; + struct s5p_gpio_bank a1; + struct s5p_gpio_bank a2; + struct s5p_gpio_bank b0; + struct s5p_gpio_bank b1; + struct s5p_gpio_bank b2; + struct s5p_gpio_bank b3; + struct s5p_gpio_bank c0; + struct s5p_gpio_bank c1; + struct s5p_gpio_bank c2; + struct s5p_gpio_bank c3; + struct s5p_gpio_bank d0; + struct s5p_gpio_bank d1; + struct s5p_gpio_bank y0; + struct s5p_gpio_bank y1; + struct s5p_gpio_bank y2; + struct s5p_gpio_bank y3; + struct s5p_gpio_bank y4; + struct s5p_gpio_bank y5; + struct s5p_gpio_bank y6; + struct s5p_gpio_bank res1[0x3]; + struct s5p_gpio_bank c4; + struct s5p_gpio_bank res2[0x48]; + struct s5p_gpio_bank x0; + struct s5p_gpio_bank x1; + struct s5p_gpio_bank x2; + struct s5p_gpio_bank x3; +}; + +struct exynos5250_gpio_part2 { + struct s5p_gpio_bank e0; + struct s5p_gpio_bank e1; + struct s5p_gpio_bank f0; + struct s5p_gpio_bank f1; + struct s5p_gpio_bank g0; + struct s5p_gpio_bank g1; + struct s5p_gpio_bank g2; + struct s5p_gpio_bank h0; + struct s5p_gpio_bank h1; +}; + +struct exynos5250_gpio_part3 { + struct s5p_gpio_bank v0; + struct s5p_gpio_bank v1; + struct s5p_gpio_bank res1[0x1]; + struct s5p_gpio_bank v2; + struct s5p_gpio_bank v3; + struct s5p_gpio_bank res2[0x1]; + struct s5p_gpio_bank v4; +}; + +struct exynos5250_gpio_part4 { + struct s5p_gpio_bank z; +}; + /* functions */ void s5p_gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg); void s5p_gpio_direction_output(struct s5p_gpio_bank *bank, int gpio,