Patchwork [U-Boot,V3,3/9] DWMMC: Initialise dwmci and resolve EMMC read write issues

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Submitter Amar
Date Dec. 31, 2012, 10:58 a.m.
Message ID <1356951500-22490-4-git-send-email-amarendra.xt@samsung.com>
Download mbox | patch
Permalink /patch/208825/
State Superseded
Delegated to: Minkyu Kang
Headers show

Comments

Amar - Dec. 31, 2012, 10:58 a.m.
This patch enumerates dwmci and set auto stop command during
dwmci initialisation.
EMMC read/write is not happening in current implementation
due to improper fifo size computation. Hence Modified the fifo size
computation to resolve EMMC read write issues.

Changes from V1:
	1)Created the macros RX_WMARK_SHIFT and RX_WMARK_MASK in header file.

Changes from V2:
	1)Updation of commit message and resubmition of proper patch set.

Signed-off-by: Amar <amarendra.xt@samsung.com>
---
 drivers/mmc/dw_mmc.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)
Jaehoon Chung - Jan. 2, 2013, 5:12 a.m.
On 12/31/2012 07:58 PM, Amar wrote:
> This patch enumerates dwmci and set auto stop command during
> dwmci initialisation.
> EMMC read/write is not happening in current implementation
> due to improper fifo size computation. Hence Modified the fifo size
> computation to resolve EMMC read write issues.
What issue for read/write?
> 
> Changes from V1:
> 	1)Created the macros RX_WMARK_SHIFT and RX_WMARK_MASK in header file.
> 
> Changes from V2:
> 	1)Updation of commit message and resubmition of proper patch set.
> 
> Signed-off-by: Amar <amarendra.xt@samsung.com>
> ---
>  drivers/mmc/dw_mmc.c | 14 ++++++++++++--
>  1 file changed, 12 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
> index 4070d4e..d8fa1a2 100644
> --- a/drivers/mmc/dw_mmc.c
> +++ b/drivers/mmc/dw_mmc.c
> @@ -136,6 +136,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
>  			return TIMEOUT;
>  		}
>  		timeout--;
> +		mdelay(1);
Why add the mdelay(1)? Could you explain to me?
>  	}
>  
>  	dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL);
> @@ -314,7 +315,7 @@ static void dwmci_set_ios(struct mmc *mmc)
>  static int dwmci_init(struct mmc *mmc)
>  {
>  	struct dwmci_host *host = (struct dwmci_host *)mmc->priv;
> -	u32 fifo_size, fifoth_val;
> +	u32 fifo_size, fifoth_val, ier;
>  
>  	dwmci_writel(host, DWMCI_PWREN, 1);
>  
> @@ -323,6 +324,14 @@ static int dwmci_init(struct mmc *mmc)
>  		return -1;
>  	}
>  
> +	/* Enumerate at 400KHz */
> +	dwmci_setup_bus(host, mmc->f_min);
> +
> +	/* Set auto stop command */
> +	ier = dwmci_readl(host, DWMCI_CTRL);
> +	ier |= (1<<10);
Use the define..ex) define DWMCI_CTRL_AUTO_STOP_CMD 	BIT(10)
> +	dwmci_writel(host, DWMCI_CTRL, ier);
If set to auto stop command, then you didn't see any problem?

Best Regards,
Jaehoon Chung
> +
>  	dwmci_writel(host, DWMCI_RINTSTS, 0xFFFFFFFF);
>  	dwmci_writel(host, DWMCI_INTMASK, 0);
>  
> @@ -332,10 +341,11 @@ static int dwmci_init(struct mmc *mmc)
>  	dwmci_writel(host, DWMCI_BMOD, 1);
>  
>  	fifo_size = dwmci_readl(host, DWMCI_FIFOTH);
> +	fifo_size = ((fifo_size & RX_WMARK_MASK) >> RX_WMARK_SHIFT) + 1;
>  	if (host->fifoth_val)
>  		fifoth_val = host->fifoth_val;
>  	else
> -		fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size/2 -1) |
> +		fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size/2 - 1) |
>  			TX_WMARK(fifo_size/2);
>  	dwmci_writel(host, DWMCI_FIFOTH, fifoth_val);
>  
>
Amarendra Reddy - Jan. 3, 2013, 7:45 a.m.
Hi Jaehoon,

Thanks for the comments.
Please find the response below.

Thanks & Regards
Amarendra Reddy


On 2 January 2013 10:42, Jaehoon Chung <jh80.chung@samsung.com> wrote:

> On 12/31/2012 07:58 PM, Amar wrote:
> > This patch enumerates dwmci and set auto stop command during
> > dwmci initialisation.
> > EMMC read/write is not happening in current implementation
> > due to improper fifo size computation. Hence Modified the fifo size
> > computation to resolve EMMC read write issues.
> What issue for read/write?

After bootup, the command 'mmcinfo' was working fine. It displays the EMMC
device properties(Manufacturer,OEM, SD version ... ) properly.
But the EMMC read / write was not happening. Then I referred to chromium
uboot working code and observed that FIFO size configuraion is missing in
our code.
After configuring FIFO size, read / write happened properly. That is what I
meant.

>
> Changes from V1:
>       1)Created the macros RX_WMARK_SHIFT and RX_WMARK_MASK in header
file.
>
> Changes from V2:
>       1)Updation of commit message and resubmition of proper patch set.
>
> Signed-off-by: Amar <amarendra.xt@samsung.com>
> ---
>  drivers/mmc/dw_mmc.c | 14 ++++++++++++--
>  1 file changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
> index 4070d4e..d8fa1a2 100644
> --- a/drivers/mmc/dw_mmc.c
> +++ b/drivers/mmc/dw_mmc.c
> @@ -136,6 +136,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct
mmc_cmd *cmd,
>                       return TIMEOUT;
>               }
>               timeout--;
> +             mdelay(1);

> Why add the mdelay(1)? Could you explain to me?

Again this one also I added after referring to chromium uboot working code.

Without mdelay(), there was a problem while writing into EMMC boot
partitions.
*Problem Description:* When I write into EMMC boot partition,
-> It fails in first attempt and displays the error *"Timeout on data
busy". *
-> Immediately it retries and succeeds in second attempt.

To avoid the above problem I added mdelay().


> >       }
> >
> >       dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL);
> > @@ -314,7 +315,7 @@ static void dwmci_set_ios(struct mmc *mmc)
> >  static int dwmci_init(struct mmc *mmc)
> >  {
> >       struct dwmci_host *host = (struct dwmci_host *)mmc->priv;
> > -     u32 fifo_size, fifoth_val;
> > +     u32 fifo_size, fifoth_val, ier;
> >
> >       dwmci_writel(host, DWMCI_PWREN, 1);
> >
> > @@ -323,6 +324,14 @@ static int dwmci_init(struct mmc *mmc)
> >               return -1;
> >       }
> >
> > +     /* Enumerate at 400KHz */
> > +     dwmci_setup_bus(host, mmc->f_min);
> > +
> > +     /* Set auto stop command */
> > +     ier = dwmci_readl(host, DWMCI_CTRL);
> > +     ier |= (1<<10);
> Use the define..ex) define DWMCI_CTRL_AUTO_STOP_CMD     BIT(10)
>
Ok.

> > +     dwmci_writel(host, DWMCI_CTRL, ier);
> If set to auto stop command, then you didn't see any problem?
>
Actually, it works fine even without setting auto stop command.
Initially I referred to the working code from chromium uboot, and tried to
maintain all our dwmci init code inline with chromium uboot.
Hence I added "set auto command".


> Best Regards,
> Jaehoon Chung
> > +
> >       dwmci_writel(host, DWMCI_RINTSTS, 0xFFFFFFFF);
> >       dwmci_writel(host, DWMCI_INTMASK, 0);
> >
> > @@ -332,10 +341,11 @@ static int dwmci_init(struct mmc *mmc)
> >       dwmci_writel(host, DWMCI_BMOD, 1);
> >
> >       fifo_size = dwmci_readl(host, DWMCI_FIFOTH);
> > +     fifo_size = ((fifo_size & RX_WMARK_MASK) >> RX_WMARK_SHIFT) + 1;
> >       if (host->fifoth_val)
> >               fifoth_val = host->fifoth_val;
> >       else
> > -             fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size/2 -1) |
> > +             fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size/2 - 1) |
> >                       TX_WMARK(fifo_size/2);
> >       dwmci_writel(host, DWMCI_FIFOTH, fifoth_val);
> >
> >
>
>  _______________________________________________
> U-Boot mailing list
> U-Boot@lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot
>

Patch

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 4070d4e..d8fa1a2 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -136,6 +136,7 @@  static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
 			return TIMEOUT;
 		}
 		timeout--;
+		mdelay(1);
 	}
 
 	dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL);
@@ -314,7 +315,7 @@  static void dwmci_set_ios(struct mmc *mmc)
 static int dwmci_init(struct mmc *mmc)
 {
 	struct dwmci_host *host = (struct dwmci_host *)mmc->priv;
-	u32 fifo_size, fifoth_val;
+	u32 fifo_size, fifoth_val, ier;
 
 	dwmci_writel(host, DWMCI_PWREN, 1);
 
@@ -323,6 +324,14 @@  static int dwmci_init(struct mmc *mmc)
 		return -1;
 	}
 
+	/* Enumerate at 400KHz */
+	dwmci_setup_bus(host, mmc->f_min);
+
+	/* Set auto stop command */
+	ier = dwmci_readl(host, DWMCI_CTRL);
+	ier |= (1<<10);
+	dwmci_writel(host, DWMCI_CTRL, ier);
+
 	dwmci_writel(host, DWMCI_RINTSTS, 0xFFFFFFFF);
 	dwmci_writel(host, DWMCI_INTMASK, 0);
 
@@ -332,10 +341,11 @@  static int dwmci_init(struct mmc *mmc)
 	dwmci_writel(host, DWMCI_BMOD, 1);
 
 	fifo_size = dwmci_readl(host, DWMCI_FIFOTH);
+	fifo_size = ((fifo_size & RX_WMARK_MASK) >> RX_WMARK_SHIFT) + 1;
 	if (host->fifoth_val)
 		fifoth_val = host->fifoth_val;
 	else
-		fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size/2 -1) |
+		fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size/2 - 1) |
 			TX_WMARK(fifo_size/2);
 	dwmci_writel(host, DWMCI_FIFOTH, fifoth_val);