From patchwork Fri Dec 28 20:34:00 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 208568 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id C51E32C00DE for ; Sat, 29 Dec 2012 07:32:53 +1100 (EST) Received: from localhost ([::1]:33672 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Togbr-0000f8-QA for incoming@patchwork.ozlabs.org; Fri, 28 Dec 2012 15:32:51 -0500 Received: from eggs.gnu.org ([208.118.235.92]:46358) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Togbb-0000ea-DL for qemu-devel@nongnu.org; Fri, 28 Dec 2012 15:32:36 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TogbW-00043R-M9 for qemu-devel@nongnu.org; Fri, 28 Dec 2012 15:32:35 -0500 Received: from mx1.redhat.com ([209.132.183.28]:41511) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TogbW-000434-El for qemu-devel@nongnu.org; Fri, 28 Dec 2012 15:32:30 -0500 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id qBSKWTeo015986 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Fri, 28 Dec 2012 15:32:29 -0500 Received: from blackpad.lan.raisama.net (vpn1-6-233.gru2.redhat.com [10.97.6.233]) by int-mx11.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id qBSKWToh020203; Fri, 28 Dec 2012 15:32:29 -0500 Received: by blackpad.lan.raisama.net (Postfix, from userid 500) id DA654203D16; Fri, 28 Dec 2012 18:34:07 -0200 (BRST) From: Eduardo Habkost To: qemu-devel@nongnu.org Date: Fri, 28 Dec 2012 18:34:00 -0200 Message-Id: <1356726846-10637-4-git-send-email-ehabkost@redhat.com> In-Reply-To: <1356726846-10637-1-git-send-email-ehabkost@redhat.com> References: <1356726846-10637-1-git-send-email-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.24 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: Igor Mammedov , =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [Qemu-devel] [PATCH 3/9] target-i386: Simplify cpu_x86_find_by_name() logic X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Move the check for "host" to beginning of function, so instead of a confusing if/else-if/else mess we now have just two obvious if/else blocks: 1) Special case for "host"; 2) General case for CPU model lookup on x86_defs list. This way, we will be able to easily move those two parts to separate class instance_init functions. Signed-off-by: Eduardo Habkost --- target-i386/cpu.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 8c4aecb..fecd674 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -1213,20 +1213,24 @@ static void cpudef_2_x86_cpu(X86CPU *cpu, x86_def_t *def, Error **errp) static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, const char *name) { - x86_def_t *def; - for (def = x86_defs; def; def = def->next) { - if (name && !strcmp(name, def->name)) { - break; - } - } if (kvm_enabled() && name && strcmp(name, "host") == 0) { #ifdef CONFIG_KVM kvm_cpu_fill_host(x86_cpu_def); #endif - } else if (!def) { - return -1; } else { + x86_def_t *def; + + for (def = x86_defs; def; def = def->next) { + if (name && !strcmp(name, def->name)) { + break; + } + } + + if (!def) { + return -1; + } + memcpy(x86_cpu_def, def, sizeof(*def)); /* sysenter isn't supported on compatibility mode on AMD, syscall * isn't supported in compatibility mode on Intel.