From patchwork Thu Dec 27 14:59:18 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Igor Mammedov X-Patchwork-Id: 208340 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 25A9A2C0097 for ; Fri, 28 Dec 2012 03:01:35 +1100 (EST) Received: from localhost ([::1]:59151 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ToExZ-0002qH-5g for incoming@patchwork.ozlabs.org; Thu, 27 Dec 2012 10:01:25 -0500 Received: from eggs.gnu.org ([208.118.235.92]:50246) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ToEwy-0001ed-NU for qemu-devel@nongnu.org; Thu, 27 Dec 2012 10:00:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ToEww-0007R2-Oi for qemu-devel@nongnu.org; Thu, 27 Dec 2012 10:00:48 -0500 Received: from mx1.redhat.com ([209.132.183.28]:21355) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ToEww-0007Qr-8u for qemu-devel@nongnu.org; Thu, 27 Dec 2012 10:00:46 -0500 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id qBRF0jJQ003903 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Thu, 27 Dec 2012 10:00:45 -0500 Received: from dell-pet610-01.lab.eng.brq.redhat.com (dell-pet610-01.lab.eng.brq.redhat.com [10.34.42.20]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id qBRF0IfU019125; Thu, 27 Dec 2012 10:00:41 -0500 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Thu, 27 Dec 2012 15:59:18 +0100 Message-Id: <1356620376-23501-3-git-send-email-imammedo@redhat.com> In-Reply-To: <1356620376-23501-1-git-send-email-imammedo@redhat.com> References: <1356620376-23501-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: ehabkost@redhat.com, afaerber@suse.de Subject: [Qemu-devel] [PATCH 02/20] target-i386: sanitize AMD's ext2_features at realize time X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org when CPU properties are implemented, ext2_features may change between object_new(CPU) and cpu_realize_fn(). Sanitizing ext2_features for AMD based CPU at realize() time will keep current behavior after CPU features are converted to properties. Signed-off-by: Igor Mammedov Reviewed-by: Eduardo Habkost Reviewed-by: Eduardo Habkost --- v2: - style fix, make line shorter than 80 characters --- target-i386/cpu.c | 21 +++++++++++---------- 1 files changed, 11 insertions(+), 10 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 63aae86..64b7637 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -1539,16 +1539,6 @@ int cpu_x86_register(X86CPU *cpu, const char *cpu_model) object_property_set_int(OBJECT(cpu), (int64_t)def->tsc_khz * 1000, "tsc-frequency", &error); - /* On AMD CPUs, some CPUID[8000_0001].EDX bits must match the bits on - * CPUID[1].EDX. - */ - if (env->cpuid_vendor1 == CPUID_VENDOR_AMD_1 && - env->cpuid_vendor2 == CPUID_VENDOR_AMD_2 && - env->cpuid_vendor3 == CPUID_VENDOR_AMD_3) { - env->cpuid_ext2_features &= ~CPUID_EXT2_AMD_ALIASES; - env->cpuid_ext2_features |= (def->features & CPUID_EXT2_AMD_ALIASES); - } - object_property_set_str(OBJECT(cpu), def->model_id, "model-id", &error); if (error) { fprintf(stderr, "%s\n", error_get_pretty(error)); @@ -2062,6 +2052,17 @@ void x86_cpu_realize(Object *obj, Error **errp) env->cpuid_level = 7; } + /* On AMD CPUs, some CPUID[8000_0001].EDX bits must match the bits on + * CPUID[1].EDX. + */ + if (env->cpuid_vendor1 == CPUID_VENDOR_AMD_1 && + env->cpuid_vendor2 == CPUID_VENDOR_AMD_2 && + env->cpuid_vendor3 == CPUID_VENDOR_AMD_3) { + env->cpuid_ext2_features &= ~CPUID_EXT2_AMD_ALIASES; + env->cpuid_ext2_features |= (env->cpuid_features + & CPUID_EXT2_AMD_ALIASES); + } + if (!kvm_enabled()) { env->cpuid_features &= TCG_FEATURES; env->cpuid_ext_features &= TCG_EXT_FEATURES;