From patchwork Thu Dec 27 06:03:23 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajeshwari Birje X-Patchwork-Id: 208269 X-Patchwork-Delegate: promsoft@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id E66C82C00A3 for ; Thu, 27 Dec 2012 16:59:49 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AD9D54A10C; Thu, 27 Dec 2012 06:59:14 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id IqZSpqC+uoPT; Thu, 27 Dec 2012 06:59:14 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 447864A10D; Thu, 27 Dec 2012 06:57:52 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 476004A0A8 for ; Thu, 27 Dec 2012 06:57:43 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 0omiRluF61WG for ; Thu, 27 Dec 2012 06:57:42 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mailout3.samsung.com (mailout3.samsung.com [203.254.224.33]) by theia.denx.de (Postfix) with ESMTP id 1820A4A100 for ; Thu, 27 Dec 2012 06:57:04 +0100 (CET) Received: from epcpsbgm1.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MFO006YMDRMKSN0@mailout3.samsung.com> for u-boot@lists.denx.de; Thu, 27 Dec 2012 14:57:02 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.126]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 84.F7.01231.E23EBD05; Thu, 27 Dec 2012 14:57:02 +0900 (KST) X-AuditID: cbfee61a-b7fa66d0000004cf-96-50dbe32e399e Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id F3.F7.01231.E23EBD05; Thu, 27 Dec 2012 14:57:02 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MFO009UDDU79J90@mmp1.samsung.com> for u-boot@lists.denx.de; Thu, 27 Dec 2012 14:57:02 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Date: Thu, 27 Dec 2012 11:33:23 +0530 Message-id: <1356588203-24838-17-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1356588203-24838-1-git-send-email-rajeshwari.s@samsung.com> References: <1356588203-24838-1-git-send-email-rajeshwari.s@samsung.com> DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrLLMWRmVeSWpSXmKPExsWyRsSkTlfv8e0AgwvN0hZv93ayOzB6nL2z gzGAMYrLJiU1J7MstUjfLoErY9aso6wFh5Ur5s1rZWtg/CrdxcjJISFgIrF3wit2CFtM4sK9 9WxdjFwcQgJLGSXuztvHAlN058RsRojEIkaJd082sEM4q5gk/m67DlbFJmAksfXkNEYQW0RA QuJX/1Uwm1kgRuL1/h9sILawgKPE7Qu/wOIsAqoSV05sZAKxeQU8JXb0HITapiBxbOpXVhCb Eyg+4coysHohAQ+JL3vOs0H0Ckh8m3wIqJ4DqF5WYtMBZpB7JAQus0kcXzcX6h1JiYMrbrBM YBRewMiwilE0tSC5oDgpPddQrzgxt7g0L10vOT93EyMwDE//eya1g3Flg8UhRgEORiUeXkXr 2wFCrIllxZW5hxglOJiVRHinbwYK8aYkVlalFuXHF5XmpBYfYvQBumQis5Rocj4wRvJK4g2N TcxNjU0tjYzMTE1xCCuJ8zZ7pAQICaQnlqRmp6YWpBbBjGPi4JRqYEyb83G5BNe27lIOZ46D L11mO8W9OCK/2n/nxU0vXx0921jV87vztbrLzH+iXQdZeQ91Ve+u8yr8JztRPuPdDIYpFytY jv3OeNv9w4rvxPFe++06TUUSh99fmpghuiOwie1w0811dWdyLB0+8Qc+VA5p/pr9s9LlzdpC A5ZHjyYHSto47Du875ESS3FGoqEWc1FxIgBEneDocAIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFuphkeLIzCtJLcpLzFFi42I5/e+xgK7e49sBBr9Xcli83dvJ7sDocfbO DsYAxqgGRpuM1MSU1CKF1Lzk/JTMvHRbJe/geOd4UzMDQ11DSwtzJYW8xNxUWyUXnwBdt8wc oLFKCmWJOaVAoYDE4mIlfTtME0JD3HQtYBojdH1DguB6jAzQQMIaxoxZs46yFhxWrpg3r5Wt gfGrdBcjJ4eEgInEnROzGSFsMYkL99azdTFycQgJLGKUePdkAzuEs4pJ4u+26ywgVWwCRhJb T04D6xARkJD41X8VzGYWiJF4vf8HG4gtLOAocfvCL7A4i4CqxJUTG5lAbF4BT4kdPQdZILYp SByb+pUVxOYEik+4sgysXkjAQ+LLnvNsExh5FzAyrGIUTS1ILihOSs811CtOzC0uzUvXS87P 3cQIDvJnUjsYVzZYHGIU4GBU4uFVtL4dIMSaWFZcmXuIUYKDWUmEd/pmoBBvSmJlVWpRfnxR aU5q8SFGH6CrJjJLiSbnAyMwryTe0NjE3NTY1NLEwsTMEoewkjhvs0dKgJBAemJJanZqakFq Ecw4Jg5OqQbGpWo7ZR4E//h4b/r5tdaGQd1SzBs9+19sWFrRKuq+0vLyCQGtlzkZHm7Rwto6 kzO4ztx77WS1Npr14/tXEwJunmRVqvT4W3tN9tki3T2X/n7KW1MWoux5c7/qtO+x063eCE5L MWoyd9KUtq9/nTj7EWPGic3LJF/nGu38f21h743dbazL9Vi3KrEUZyQaajEXFScCADM+DmGf AgAA X-CFilter-Loop: Reflected Cc: patches@linaro.org Subject: [U-Boot] [PATCH 16/16 V2] SPI: EXYNOS: Add FDT support to driver. X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This patch adds FDT support to the SPI driver. Signed-off-by: Simon Glass Signed-off-by: Rajeshwari Shinde Acked-by: Simon Glass --- Changes since V1: - Corrected compilation error for non DT and removed extra blank line. drivers/spi/exynos_spi.c | 96 +++++++++++++++++++++++++++++++++++++++++++--- 1 files changed, 90 insertions(+), 6 deletions(-) diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c index 3e6c18f..be60ada 100644 --- a/drivers/spi/exynos_spi.c +++ b/drivers/spi/exynos_spi.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -28,16 +29,20 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* Information about each SPI controller */ struct spi_bus { enum periph_id periph_id; s32 frequency; /* Default clock frequency, -1 for none */ struct exynos_spi *regs; int inited; /* 1 if this bus is ready for use */ + int node; }; /* A list of spi buses that we know about */ static struct spi_bus spi_bus[EXYNOS5_SPI_NUM_CONTROLLERS]; +static unsigned int bus_count; struct exynos_spi_slave { struct spi_slave slave; @@ -50,7 +55,7 @@ struct exynos_spi_slave { static struct spi_bus *spi_get_bus(unsigned dev_index) { - if (dev_index < EXYNOS5_SPI_NUM_CONTROLLERS) + if (dev_index < bus_count) return &spi_bus[dev_index]; debug("%s: invalid bus %d", __func__, dev_index); @@ -347,21 +352,100 @@ static inline struct exynos_spi *get_spi_base(int dev_index) (dev_index - 3); } +/* + * Read the SPI config from the device tree node. + * + * @param blob FDT blob to read from + * @param node Node offset to read from + * @param bus SPI bus structure to fill with information + * @return 0 if ok, or -FDT_ERR_NOTFOUND if something was missing + */ +static int spi_get_config(const void *blob, int node, struct spi_bus *bus) +{ + bus->node = node; + bus->regs = (struct exynos_spi *)fdtdec_get_addr(blob, node, "reg"); + bus->periph_id = pinmux_decode_periph_id(blob, node); + + if (bus->periph_id == PERIPH_ID_NONE) { + debug("%s: Invalid peripheral ID %d\n", __func__, + bus->periph_id); + return -FDT_ERR_NOTFOUND; + } + + /* Use 500KHz as a suitable default */ + bus->frequency = fdtdec_get_int(blob, node, "spi-max-frequency", + 500000); + + return 0; +} + +/* + * Process a list of nodes, adding them to our list of SPI ports. + * + * @param blob fdt blob + * @param node_list list of nodes to process (any <=0 are ignored) + * @param count number of nodes to process + * @param is_dvc 1 if these are DVC ports, 0 if standard I2C + * @return 0 if ok, -1 on error + */ +static int process_nodes(const void *blob, int node_list[], int count) +{ + int i; + + /* build the i2c_controllers[] for each controller */ + for (i = 0; i < count; i++) { + int node = node_list[i]; + struct spi_bus *bus; + + if (node <= 0) + continue; + + bus = &spi_bus[i]; + if (spi_get_config(blob, node, bus)) { + printf("exynos spi_init: failed to decode bus %d\n", + i); + return -1; + } + + debug("spi: controller bus %d at %p, periph_id %d\n", + i, bus->regs, bus->periph_id); + bus->inited = 1; + bus_count++; + } + + return 0; +} + /* Sadly there is no error return from this function */ void spi_init(void) { - int i; + int count; + +#ifdef CONFIG_OF_CONTROL + int node_list[EXYNOS5_SPI_NUM_CONTROLLERS]; + const void *blob = gd->fdt_blob; + + count = fdtdec_find_aliases_for_id(blob, "spi", + COMPAT_SAMSUNG_EXYNOS_SPI, node_list, + EXYNOS5_SPI_NUM_CONTROLLERS); + if (process_nodes(blob, node_list, count)) + return; + +#else struct spi_bus *bus; - for (i = 0; i < EXYNOS5_SPI_NUM_CONTROLLERS; i++) { - bus = &spi_bus[i]; - bus->regs = get_spi_base(i); - bus->periph_id = PERIPH_ID_SPI0 + i; + for (count = 0; count < EXYNOS5_SPI_NUM_CONTROLLERS; count++) { + bus = &spi_bus[count]; + bus->regs = get_spi_base(count); + bus->periph_id = PERIPH_ID_SPI0 + count; /* Although Exynos5 supports upto 50Mhz speed, * we are setting it to 10Mhz for safe side */ bus->frequency = 10000000; bus->inited = 1; + bus->node = 0; + bus_count = EXYNOS5_SPI_NUM_CONTROLLERS; } +#endif }