| Submitter | Richard Sandiford |
|---|---|
| Date | Dec. 23, 2012, 10:02 a.m. |
| Message ID | <87handulw8.fsf@talisman.default> |
| Download | mbox | patch |
| Permalink | /patch/207955/ |
| State | New |
| Headers | show |
Comments
Patch
Index: gcc/testsuite/gcc.target/mips/r10k-cache-barrier-10.c =================================================================== --- gcc/testsuite/gcc.target/mips/r10k-cache-barrier-10.c 2012-12-23 09:14:02.000000000 +0000 +++ gcc/testsuite/gcc.target/mips/r10k-cache-barrier-10.c 2012-12-23 09:19:45.559582821 +0000 @@ -9,6 +9,12 @@ unsigned char *bar (int); NOMIPS16 void foo (unsigned char *n) { + /* n starts in $4, but will be in $2 after the call to bar. + Encourage it to be in $2 on entry to the loop as well, + by doing some computation on it beforehand (D?ADDIU $2,$4,4). + dbr_schedule should then pull the *n load (L[WD] ...,0($2)) + into the delay slot. */ + n += 4; do n = bar (*n + 1); while (n);