Patchwork [U-Boot,04/09] powerpc/mpc85xx:Fix Core cluster configuration loop

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Submitter poonam aggrwal
Date Dec. 21, 2012, 12:47 p.m.
Message ID <1356094033-12932-1-git-send-email-poonam.aggrwal@freescale.com>
Download mbox | patch
Permalink /patch/207802/
State Superseded
Delegated to: Andy Fleming
Headers show

Comments

poonam aggrwal - Dec. 21, 2012, 12:47 p.m.
From: Prabhakar Kushwaha <prabhakar@freescale.com>

Different personalities/derivatives of SoC may have reduced cluster. But it is
not necessary for last valid DCFG_CCSR_TP_CLUSTER register to have
DCFG_CCSR_TP_CLUSTER[EOC] bit set to represent "End of Clusters".

EOC bit can still be set in last DCFG_CCSR_TP_CLUSTER register of orignal SoC
which may not be valid for the personality.
So add initiator type check to find valid cluster.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
---
 arch/powerpc/cpu/mpc85xx/cpu_init.c |   30 ++++++++++++++++++++++--------
 1 files changed, 22 insertions(+), 8 deletions(-)

Patch

diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index d1155e8..cc09300 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -312,19 +312,33 @@  int enable_cluster_l2(void)
 
 	/* Look through the remaining clusters, and set up their caches */
 	do {
+		int j, cluster_valid = 0;
+
 		l2cache = (void __iomem *)(CONFIG_SYS_FSL_CLUSTER_1_L2 + i * 0x40000);
+
 		cluster = in_be32(&gur->tp_cluster[i].lower);
 
-		/* set stash ID to (cluster) * 2 + 32 + 1 */
-		clrsetbits_be32(&l2cache->l2csr1, 0xff, 32 + i * 2 + 1);
+		/* check that at least one core/accel is enabled in cluster */
+		for (j = 0; j < 4; j++) {
+			u32 idx = (cluster >> (j*8)) & TP_CLUSTER_INIT_MASK;
+			u32 type = in_be32(&gur->tp_ityp[idx]);
 
-		printf("enable l2 for cluster %d %p\n", i, l2cache);
+			if (type & TP_ITYP_AV)
+				cluster_valid = 1;
+		}
 
-		out_be32(&l2cache->l2csr0, L2CSR0_L2FI|L2CSR0_L2LFC);
-		while ((in_be32(&l2cache->l2csr0) &
-			(L2CSR0_L2FI|L2CSR0_L2LFC)) != 0)
-			;
-		out_be32(&l2cache->l2csr0, L2CSR0_L2E);
+		if (cluster_valid) {
+			/* set stash ID to (cluster) * 2 + 32 + 1 */
+			clrsetbits_be32(&l2cache->l2csr1, 0xff, 32 + i * 2 + 1);
+
+			printf("enable l2 for cluster %d %p\n", i, l2cache);
+
+			out_be32(&l2cache->l2csr0, L2CSR0_L2FI|L2CSR0_L2LFC);
+			while ((in_be32(&l2cache->l2csr0)
+				& (L2CSR0_L2FI|L2CSR0_L2LFC)) != 0)
+					;
+			out_be32(&l2cache->l2csr0, L2CSR0_L2E);
+		}
 		i++;
 	} while (!(cluster & TP_CLUSTER_EOC));