From patchwork Fri Dec 21 05:36:12 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [U-Boot] powerpc/mpc8572ds: Enable bank interleaving to cs0+cs1 for dual-rank DIMMs Date: Thu, 20 Dec 2012 19:36:12 -0000 From: Hongtao Jia X-Patchwork-Id: 207762 Message-Id: <1356068172-21575-1-git-send-email-B38951@freescale.com> To: Cc: afleming@gmail.com, leoli@freescale.com, R58495@freescale.com, b38951@freescale.com The controller interleaving only takes the usable memory mapped to cs0. In the case of bank interleaving not enabled, only half of dual-rank DIMM will be used. For single-rank DIMM bank interleaving will be auto disabled. Signed-off-by: Jia Hongtao Signed-off-by: Li Yang --- include/configs/MPC8572DS.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index a62b7d5..d233365 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -735,7 +735,7 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_EXTRA_ENV_SETTINGS \ -"hwconfig=fsl_ddr:ctlr_intlv=bank,ecc=off\0" \ +"hwconfig=fsl_ddr:ctlr_intlv=bank,bank_intlv=cs0_cs1,ecc=off\0" \ "netdev=eth0\0" \ "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \