From patchwork Thu Dec 20 16:05:50 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Williamson X-Patchwork-Id: 207681 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 8CE2B2C0092 for ; Fri, 21 Dec 2012 03:06:11 +1100 (EST) Received: from localhost ([::1]:46360 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TlidM-00076K-LO for incoming@patchwork.ozlabs.org; Thu, 20 Dec 2012 11:06:08 -0500 Received: from eggs.gnu.org ([208.118.235.92]:60929) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TlidD-00075y-DH for qemu-devel@nongnu.org; Thu, 20 Dec 2012 11:06:01 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Tlid7-0006wW-Hn for qemu-devel@nongnu.org; Thu, 20 Dec 2012 11:05:59 -0500 Received: from mx1.redhat.com ([209.132.183.28]:12949) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tlid7-0006wJ-Af; Thu, 20 Dec 2012 11:05:53 -0500 Received: from int-mx12.intmail.prod.int.phx2.redhat.com (int-mx12.intmail.prod.int.phx2.redhat.com [10.5.11.25]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id qBKG5ph1020301 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Thu, 20 Dec 2012 11:05:52 -0500 Received: from bling.home (ovpn-113-102.phx2.redhat.com [10.3.113.102]) by int-mx12.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id qBKG5pvF005949; Thu, 20 Dec 2012 11:05:51 -0500 To: qemu-devel@nongnu.org From: Alex Williamson Date: Thu, 20 Dec 2012 09:05:50 -0700 Message-ID: <20121220160107.3975.53264.stgit@bling.home> User-Agent: StGit/0.16 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.68 on 10.5.11.25 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: jan.kiszka@siemens.com, qemu-stable@nongnu.org, mst@redhat.com Subject: [Qemu-devel] [PATCH] pci-assign: Enable MSIX on device to match guest X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org When a guest enables MSIX on a device we evaluate the MSIX vector table, typically find no unmasked vectors and don't switch the device to MSIX mode. This generally works fine and the device will be switched once the guest enables and therefore unmasks a vector. Unfortunately some drivers enable MSIX, then use interfaces to send commands between VF & PF or PF & firmware that act based on the host state of the device. These therefore break when MSIX is managed lazily. This change re-enables the previous test used to enable MSIX (see qemu-kvm a6b402c9), which basically guesses whether a vector will be used based on the data field of the vector table. Cc: qemu-stable@nongnu.org Signed-off-by: Alex Williamson --- hw/kvm/pci-assign.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) I think we might be able to do a little better than this, but I think this is the right fix for stable and we can build on it to perhaps only enable a single vector. diff --git a/hw/kvm/pci-assign.c b/hw/kvm/pci-assign.c index e80dad0..12a219b 100644 --- a/hw/kvm/pci-assign.c +++ b/hw/kvm/pci-assign.c @@ -1025,6 +1025,19 @@ static bool assigned_dev_msix_masked(MSIXTableEntry *entry) return (entry->ctrl & cpu_to_le32(0x1)) != 0; } +/* + * When MSI-X is first enabled the vector table typically has all the + * vectors masked, so we can't use that as the obvious test to figure out + * how many vectors to initially enable. Instead we look at the data field + * because this is what worked for pci-assign for a long time. This makes + * sure the physical MSI-X state tracks the guest's view, which is important + * for some VF/PF and PF/fw communication channels. + */ +static bool assigned_dev_msix_skipped(MSIXTableEntry *entry) +{ + return !entry->data; +} + static int assigned_dev_update_msix_mmio(PCIDevice *pci_dev) { AssignedDevice *adev = DO_UPCAST(AssignedDevice, dev, pci_dev); @@ -1035,7 +1048,7 @@ static int assigned_dev_update_msix_mmio(PCIDevice *pci_dev) /* Get the usable entry number for allocating */ for (i = 0; i < adev->msix_max; i++, entry++) { - if (assigned_dev_msix_masked(entry)) { + if (assigned_dev_msix_skipped(entry)) { continue; } entries_nr++; @@ -1064,7 +1077,7 @@ static int assigned_dev_update_msix_mmio(PCIDevice *pci_dev) for (i = 0; i < adev->msix_max; i++, entry++) { adev->msi_virq[i] = -1; - if (assigned_dev_msix_masked(entry)) { + if (assigned_dev_msix_skipped(entry)) { continue; }