From patchwork Wed Dec 19 16:27:43 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 207454 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 9FB902C0089 for ; Thu, 20 Dec 2012 03:29:31 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 142304A097; Wed, 19 Dec 2012 17:28:53 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 375x0LZGFB4t; Wed, 19 Dec 2012 17:28:52 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 10F004A027; Wed, 19 Dec 2012 17:28:45 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 728F44A047 for ; Wed, 19 Dec 2012 17:28:43 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id tKHhYB+oJtfg for ; Wed, 19 Dec 2012 17:28:42 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-da0-f52.google.com (mail-da0-f52.google.com [209.85.210.52]) by theia.denx.de (Postfix) with ESMTPS id 6D31B4A044 for ; Wed, 19 Dec 2012 17:28:24 +0100 (CET) Received: by mail-da0-f52.google.com with SMTP id f10so1002672dak.11 for ; Wed, 19 Dec 2012 08:28:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=L4r/PoKnOGNIw63SZ2cVkYq7dLEGVm0lznxXWDRXM4w=; b=v80WipM/tKNUc0UTV7FfKne1LRhMksLd+dC+jbHAl8+nFFFUAkM+iIbiC/O6KFVkuP cV9GYyfUg1UFncvs7a9CNVFo6vuZByU0DgbjQZbDwSQ5Mf6rLkF6tpCezK428LV+/TOo CFuHRlAU8M3o4KaHrOgVjYyaJO0Fobm+Bo1n5wXRCHGnn2Z9OLyi7og2h+hE1nNrxEl/ EUz2G1GhGzvlaz9+NUr4TpNSZeZXFZz1PyKv6HkRoCYFQNSGnu1HdRp0/N2KcD6rtI3h UUXDAz2EZcGJxLJd9hN/k4qRNHPkVdsAi7p0abR3/973blkt8sCjyZqlMDmWJY7vYvwh iw9g== X-Received: by 10.68.235.71 with SMTP id uk7mr20444362pbc.10.1355934502209; Wed, 19 Dec 2012 08:28:22 -0800 (PST) Received: from localhost.localdomain ([123.237.83.48]) by mx.google.com with ESMTPS id z5sm3683430pax.9.2012.12.19.08.28.19 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 19 Dec 2012 08:28:21 -0800 (PST) From: Jagannadha Sutradharudu Teki To: u-boot@lists.denx.de Date: Wed, 19 Dec 2012 21:57:43 +0530 Message-Id: <1355934463-24319-6-git-send-email-jagannadh.teki@gmail.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1355934463-24319-1-git-send-email-jagannadh.teki@gmail.com> References: <1355934463-24319-1-git-send-email-jagannadh.teki@gmail.com> Subject: [U-Boot] [U-Boot,v2 6/6] sf: Set QUAD enable bit support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This patch provides support to set the QUAD enable bit on flash. QUAD enable bit needs to set before performing any QUAD IO operations on respective SPI flashes. User need to use spi_flash_set_quad_enable_bit() to set the QUAD enable bit based on their usage. Signed-off-by: Jagannadha Sutradharudu Teki Tested-by: Jagannadha Sutradharudu Teki Acked-by: Simon Glass --- Changes in v2: Improved code logic drivers/mtd/spi/spi_flash.c | 31 +++++++++++++++++++++++++++++++ drivers/mtd/spi/spi_flash_internal.h | 4 ++++ 2 files changed, 35 insertions(+), 0 deletions(-) diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 5bddde4..675a0bf 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -329,6 +329,37 @@ int spi_flash_cmd_read_config(struct spi_flash *flash, void *data) return 0; } +int spi_flash_set_quad_enable_bit(struct spi_flash *flash) +{ + u8 data = 0, write_done = 0; + int ret, pass; + + for (pass = 0; pass < 2; pass++) { + ret = spi_flash_cmd_read_config(flash, (void *)&data); + if (ret < 0) { + debug("SF: fail to read config register\n"); + return ret; + } + + if (data & STATUS_QEB) { + debug("SF: quad enable bit is set.\n"); + return ret; + } else if (write_done != 1) { + debug("SF: need to set quad enable bit\n"); + + write_done = 1; + ret = spi_flash_cmd_write_config(flash, STATUS_QEB); + if (ret < 0) { + debug("SF: fail to write quad enable bit\n"); + return ret; + } + } + } + + debug("SF: fail to set quad enable bit\n"); + return -1; +} + /* * The following table holds all device probe functions * diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h index 844e82e..15c7ac4 100644 --- a/drivers/mtd/spi/spi_flash_internal.h +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -31,6 +31,7 @@ /* Common status */ #define STATUS_WIP 0x01 +#define STATUS_QEB 0x02 /* Send a single-byte command to the device and read the response */ int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len); @@ -87,6 +88,9 @@ int spi_flash_cmd_write_config(struct spi_flash *flash, u8 cr); /* Read the config register */ int spi_flash_cmd_read_config(struct spi_flash *flash, void *data); +/* Set the QUAD enable bit */ +int spi_flash_set_quad_enable_bit(struct spi_flash *flash); + /* * Same as spi_flash_cmd_read() except it also claims/releases the SPI * bus. Used as common part of the ->read() operation.