From patchwork Wed Dec 19 03:23:19 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [U-Boot, v2] boards/T4240qds:Fix IFC AMASK init as per FPGA register space From: Prabhakar Kushwaha X-Patchwork-Id: 207238 Message-Id: <1355887399-21212-1-git-send-email-prabhakar@freescale.com> To: Cc: afleming@freescale.com Date: Wed, 19 Dec 2012 08:53:19 +0530 T4240QDS's QIXIS FPGA has 4k register space size and IFC controller's Address Mask Registers is initialised 64K size. So Fix the Address Mask Register initilisation as 4K Signed-off-by: Prabhakar Kushwaha --- Changes for v2: - Spaces around binary operators include/configs/t4qds.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index d58c24c..d93e026 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -259,7 +259,7 @@ unsigned long get_board_ddr_clk(void); | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_GPCM \ | CSPR_V) -#define CONFIG_SYS_AMASK3 IFC_AMASK(64*1024) +#define CONFIG_SYS_AMASK3 IFC_AMASK(4 * 1024) #define CONFIG_SYS_CSOR3 0x0 /* QIXIS Timing parameters for IFC CS3 */ #define CONFIG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \