From patchwork Tue Dec 18 10:15:45 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prabhakar Kushwaha X-Patchwork-Id: 207052 X-Patchwork-Delegate: afleming@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 200C72C0086 for ; Tue, 18 Dec 2012 21:31:30 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C251F4A03F; Tue, 18 Dec 2012 11:31:25 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id QUUoUk9EMt5e; Tue, 18 Dec 2012 11:31:25 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A09344A044; Tue, 18 Dec 2012 11:31:22 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3CFE14A044 for ; Tue, 18 Dec 2012 11:31:17 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id vqVhKf+iL9ER for ; Tue, 18 Dec 2012 11:31:15 +0100 (CET) X-Greylist: delayed 906 seconds by postgrey-1.27 at theia; Tue, 18 Dec 2012 11:31:12 CET X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from co9outboundpool.messaging.microsoft.com (co9ehsobe005.messaging.microsoft.com [207.46.163.28]) by theia.denx.de (Postfix) with ESMTPS id ADC434A03F for ; Tue, 18 Dec 2012 11:31:12 +0100 (CET) Received: from mail164-co9-R.bigfish.com (10.236.132.249) by CO9EHSOBE012.bigfish.com (10.236.130.75) with Microsoft SMTP Server id 14.1.225.23; Tue, 18 Dec 2012 10:16:02 +0000 Received: from mail164-co9 (localhost [127.0.0.1]) by mail164-co9-R.bigfish.com (Postfix) with ESMTP id C21462200C0 for ; Tue, 18 Dec 2012 10:16:02 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 6 X-BigFish: VS6(zzzz1de0h1202h1e76h1d1ah1d2ahzz8275bhz2dh2a8h668h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h10bek1119k1155h) Received: from mail164-co9 (localhost.localdomain [127.0.0.1]) by mail164-co9 (MessageSwitch) id 1355825761170770_2009; Tue, 18 Dec 2012 10:16:01 +0000 (UTC) Received: from CO9EHSMHS013.bigfish.com (unknown [10.236.132.247]) by mail164-co9.bigfish.com (Postfix) with ESMTP id 2561042005A for ; Tue, 18 Dec 2012 10:16:01 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CO9EHSMHS013.bigfish.com (10.236.130.23) with Microsoft SMTP Server (TLS) id 14.1.225.23; Tue, 18 Dec 2012 10:15:59 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server (TLS) id 14.2.318.3; Tue, 18 Dec 2012 10:15:58 +0000 Received: from b32579-VirtualBox.ap.freescale.net (B32579-02.ap.freescale.net [10.232.133.39] (may be forged)) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id qBIAFoxd023392; Tue, 18 Dec 2012 03:15:56 -0700 From: Prabhakar Kushwaha To: Date: Tue, 18 Dec 2012 15:45:45 +0530 Message-ID: <1355825745-29101-1-git-send-email-prabhakar@freescale.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 X-OriginatorOrg: freescale.com Cc: afleming@freescale.com Subject: [U-Boot] [PATCH] board/T4240qds:Fix TLB and LAW size of NAND flash X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de The internal SRAM of Freescale's IFC NAND machine is of 64K and controller's Address Mask Registers is initialised with the same. So Update TLB and LAW size of NAND flash accordingly. Signed-off-by: Prabhakar Kushwaha --- board/freescale/t4qds/law.c | 2 +- board/freescale/t4qds/tlb.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/board/freescale/t4qds/law.c b/board/freescale/t4qds/law.c index 5debcf6..6f2c5c8 100644 --- a/board/freescale/t4qds/law.c +++ b/board/freescale/t4qds/law.c @@ -40,7 +40,7 @@ struct law_entry law_table[] = { SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR), #endif #ifdef CONFIG_SYS_NAND_BASE_PHYS - SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_IFC), + SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC), #endif }; diff --git a/board/freescale/t4qds/tlb.c b/board/freescale/t4qds/tlb.c index 078a6e4..80eb511 100644 --- a/board/freescale/t4qds/tlb.c +++ b/board/freescale/t4qds/tlb.c @@ -125,7 +125,7 @@ struct fsl_e_tlb_entry tlb_table[] = { */ SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 16, BOOKE_PAGESZ_1M, 1), + 0, 16, BOOKE_PAGESZ_64K, 1), #endif SET_TLB_ENTRY(1, QIXIS_BASE, QIXIS_BASE_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,