From patchwork Fri Dec 14 12:13:16 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 206421 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id E83992C0097 for ; Fri, 14 Dec 2012 23:14:54 +1100 (EST) Received: from localhost ([::1]:50611 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TjUAG-0005N7-Tm for incoming@patchwork.ozlabs.org; Fri, 14 Dec 2012 07:14:52 -0500 Received: from eggs.gnu.org ([208.118.235.92]:56268) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TjUA5-0005LP-Uc for qemu-devel@nongnu.org; Fri, 14 Dec 2012 07:14:46 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TjUA4-0000vG-C7 for qemu-devel@nongnu.org; Fri, 14 Dec 2012 07:14:41 -0500 Received: from cantor2.suse.de ([195.135.220.15]:39237 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TjUA4-0000js-3A; Fri, 14 Dec 2012 07:14:40 -0500 Received: from relay2.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id 9C391A4C0E; Fri, 14 Dec 2012 13:13:58 +0100 (CET) From: Alexander Graf To: "qemu-ppc@nongnu.org List" Date: Fri, 14 Dec 2012 13:13:16 +0100 Message-Id: <1355487236-27451-1-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.6.0.2 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 195.135.220.15 Cc: qemu-devel qemu-devel Subject: [Qemu-devel] [PULL 00/40] ppc patch queue 2012-12-14 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Hi Blue / Aurelien, This is my current patch queue for ppc. Please pull. Alex The following changes since commit 1c97e303d4ea80a2691334b0febe87a50660f99d: Anthony Liguori (1): Merge remote-tracking branch 'afaerber/qom-cpu' into staging are available in the git repository at: git://repo.or.cz/qemu/agraf.git ppc-for-upstream Alexander Graf (27): openpic: Remove unused code mpic: Unify numbering scheme openpic: update to proper memory api openpic: combine mpic and openpic src handlers openpic: Convert subregions to memory api openpic: combine mpic and openpic irq raise functions openpic: merge mpic and openpic timer handling openpic: combine openpic and mpic reset functions openpic: unify memory api subregions openpic: remove unused type variable openpic: convert simple reg operations to builtin bitops openpic: rename openpic_t to OpenPICState openpic: remove irq_out openpic: convert to qdev openpic: make brr1 model specific openpic: add Shared MSI support PPC: e500: Add MSI support PPC: e500: Declare pci bridge as bridge MSI-X: Fix endianness openpic: fix minor coding style issues openpic: Accelerate pending irq search PPC: E500: PCI: Make first slot qdev settable PPC: E500: PCI: Make IRQ calculation more generic PPC: E500: Generate dt pci irq map dynamically PPC: E500: Move PCI slot information into params PPC: E500plat: Make a lot of PCI slots available PPC: e500: pci: Export slot2irq calculation Ben Herrenschmidt (2): pseries: Use #define for XICS base irq number pseries: Allow RTAS tokens without a qemu handler Bharat Bhushan (2): e500: Adding CCSR memory region Adding BAR0 for e500 PCI controller David Gibson (8): pseries: Fix incorrect initialization of interrupt controller pseries: Add tracepoints to the XICS interrupt controller pseries: Split xics irq configuration from state information pseries: Implement PAPR NVRAM pseries: Update SLOF for NVRAM support pseries: Don't allow TCE (iommu) tables to be registered with duplicate LIOBNs target-ppc: Don't use hwaddr to represent hardware state pseries: Increase default NVRAM size Michael Ellerman (1): pseries: Return the token when we register an RTAS call hw/msix.c | 6 +- hw/openpic.c | 1397 ++++++++++++++++++-------------------------------- hw/openpic.h | 7 +- hw/ppc/Makefile.objs | 2 +- hw/ppc/e500-ccsr.h | 17 + hw/ppc/e500.c | 205 ++++++-- hw/ppc/e500.h | 2 + hw/ppc/e500plat.c | 3 + hw/ppc/mpc8544ds.c | 2 + hw/ppc_newworld.c | 25 +- hw/ppce500_pci.c | 58 ++- hw/ppce500_pci.h | 9 + hw/spapr.c | 35 ++- hw/spapr.h | 4 +- hw/spapr_iommu.c | 6 + hw/spapr_nvram.c | 196 +++++++ hw/spapr_rtas.c | 6 +- hw/xics.c | 47 ++- hw/xics.h | 1 + pc-bios/README | 2 +- pc-bios/slof.bin | Bin 878640 -> 880832 bytes qemu-config.c | 4 + roms/SLOF | 2 +- target-ppc/cpu.h | 2 +- trace-events | 13 + 25 files changed, 1043 insertions(+), 1008 deletions(-) create mode 100644 hw/ppc/e500-ccsr.h create mode 100644 hw/ppce500_pci.h create mode 100644 hw/spapr_nvram.c