From patchwork Fri Dec 14 02:21:31 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 206278 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id DEBDD2C00A6 for ; Fri, 14 Dec 2012 13:22:30 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id ED62D4A16A; Fri, 14 Dec 2012 03:22:24 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id WIxrOsNfGBVr; Fri, 14 Dec 2012 03:22:24 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 71C314A16C; Fri, 14 Dec 2012 03:22:00 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A12244A163 for ; Fri, 14 Dec 2012 03:21:53 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id dZQAEPkdk2qG for ; Fri, 14 Dec 2012 03:21:52 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-qa0-f74.google.com (mail-qa0-f74.google.com [209.85.216.74]) by theia.denx.de (Postfix) with ESMTPS id 17E484A144 for ; Fri, 14 Dec 2012 03:21:49 +0100 (CET) Received: by mail-qa0-f74.google.com with SMTP id r4so34439qaq.3 for ; Thu, 13 Dec 2012 18:21:48 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=K6pqiA2SllIFP9gt/Ztvo2hIoM3bNovICu8kS58guk4=; b=ieHnj2rMKNvr3pbgYBMn8S+Gu8oUP3ufeew5LFchg6+cdkB/FhHJRp7xbhmQrjfjod mZFASdDfw7jAAnDo1nIQ8cH1WYyo90QhOi/lYSA3svIIYxVpk3Vg7xS+jnMt6UzUeKfn NpRRHnFYqm2ju1jNvPAY+ZPifWwfnI+DdqxEfC5njNUWtguQsqG9qh6Rff9y3FagYFrm cfHl3edhaneZOxsG7sNqHqwIUOIXnijp4PCZaHZjIj4bR8qOh3AcrrkRad9fDwSvUtqv EnyPbJ8gBzW/5vTJUbTmPYWvkSzlP9exNxd+mgJbmOvt1+750WXNi+62uCTG2ItmCOkY pbzA== Received: by 10.236.85.51 with SMTP id t39mr1824925yhe.15.1355451708291; Thu, 13 Dec 2012 18:21:48 -0800 (PST) Received: from wpzn3.hot.corp.google.com (216-239-44-65.google.com [216.239.44.65]) by gmr-mx.google.com with ESMTPS id s78si309536yhh.3.2012.12.13.18.21.48 (version=TLSv1/SSLv3 cipher=AES128-SHA); Thu, 13 Dec 2012 18:21:48 -0800 (PST) Received: from kaka.mtv.corp.google.com (kaka.mtv.corp.google.com [172.22.73.79]) by wpzn3.hot.corp.google.com (Postfix) with ESMTP id 9290F100047; Thu, 13 Dec 2012 18:21:47 -0800 (PST) Received: by kaka.mtv.corp.google.com (Postfix, from userid 121222) id 47F6116099F; Thu, 13 Dec 2012 18:21:47 -0800 (PST) From: Simon Glass To: U-Boot Mailing List Date: Thu, 13 Dec 2012 18:21:31 -0800 Message-Id: <1355451692-28017-7-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 1.7.7.3 In-Reply-To: <1355451692-28017-1-git-send-email-sjg@chromium.org> References: <1355451692-28017-1-git-send-email-sjg@chromium.org> X-Gm-Message-State: ALoCoQnJ6agC0GfjTIZFrhK9usIe3R4foqCSgekhuZqHdPSX0BNTiLcQri+KRInZGrrslQNoD/K3OE4Pt8OPC2UP+ifiUpSsFQlIRon47yknVS4u+z8OY2ZJIKwTPy6ZL3i2ODwNxB2QsM4nQeEcwMQ3RVWkfaT+syMSDddppZWqWGgVYr1n6JSXHbuuJGfdtzCBmyoWTtjm Cc: Vincent Palatin Subject: [U-Boot] [PATCH v2 6/7] usb: Add multiple controllers support for EHCI PCI X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Vincent Palatin Use the ability to have several active EHCI controller on a system in the PCI EHCI controller implementation. Signed-off-by: Simon Glass --- Changes in v2: - Add blank line before function return drivers/usb/host/ehci-pci.c | 26 +++++++++++++++++--------- 1 files changed, 17 insertions(+), 9 deletions(-) diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c index 8064a32..b258772 100644 --- a/drivers/usb/host/ehci-pci.c +++ b/drivers/usb/host/ehci-pci.c @@ -34,7 +34,7 @@ static struct pci_device_id ehci_pci_ids[] = { {0, 0} }; #else -static pci_dev_t ehci_find_class(void) +static pci_dev_t ehci_find_class(int index) { int bus; int devnum; @@ -54,7 +54,8 @@ static pci_dev_t ehci_find_class(void) bdf += PCI_BDF(0, 0, 1)) { pci_read_config_dword(bdf, PCI_CLASS_REVISION, &class); - if (class >> 8 == PCI_CLASS_SERIAL_USB_EHCI) + if ((class >> 8 == PCI_CLASS_SERIAL_USB_EHCI) + && !index--) return bdf; } } @@ -68,34 +69,41 @@ static pci_dev_t ehci_find_class(void) * Create the appropriate control structures to manage * a new EHCI host controller. */ -int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor) +int ehci_hcd_init(int index, struct ehci_hccr **ret_hccr, + struct ehci_hcor **ret_hcor) { pci_dev_t pdev; uint32_t cmd; + struct ehci_hccr *hccr; + struct ehci_hcor *hcor; #ifdef CONFIG_PCI_EHCI_DEVICE pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVICE); #else - pdev = ehci_find_class(); + pdev = ehci_find_class(index); #endif if (pdev < 0) { printf("EHCI host controller not found\n"); return -1; } - *hccr = (struct ehci_hccr *)pci_map_bar(pdev, + hccr = (struct ehci_hccr *)pci_map_bar(pdev, PCI_BASE_ADDRESS_0, PCI_REGION_MEM); - *hcor = (struct ehci_hcor *)((uint32_t) *hccr + - HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); + hcor = (struct ehci_hcor *)((uint32_t) hccr + + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); debug("EHCI-PCI init hccr 0x%x and hcor 0x%x hc_length %d\n", - (uint32_t)*hccr, (uint32_t)*hcor, - (uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); + (uint32_t)hccr, (uint32_t)hcor, + (uint32_t)HC_LENGTH(ehci_readl(&hccr->cr_capbase))); /* enable busmaster */ pci_read_config_dword(pdev, PCI_COMMAND, &cmd); cmd |= PCI_COMMAND_MASTER; pci_write_config_dword(pdev, PCI_COMMAND, cmd); + + *ret_hccr = hccr; + *ret_hcor = hcor; + return 0; }