From patchwork Fri Dec 14 02:12:02 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Scott Wood X-Patchwork-Id: 206272 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id BF3512C009F for ; Fri, 14 Dec 2012 13:12:49 +1100 (EST) Received: from localhost ([::1]:53299 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TjKlb-0004mx-Me for incoming@patchwork.ozlabs.org; Thu, 13 Dec 2012 21:12:47 -0500 Received: from eggs.gnu.org ([208.118.235.92]:37434) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TjKlE-0004bd-96 for qemu-devel@nongnu.org; Thu, 13 Dec 2012 21:12:26 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TjKlB-0005bf-Da for qemu-devel@nongnu.org; Thu, 13 Dec 2012 21:12:24 -0500 Received: from va3ehsobe002.messaging.microsoft.com ([216.32.180.12]:12989 helo=va3outboundpool.messaging.microsoft.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TjKl3-0005TH-RC; Thu, 13 Dec 2012 21:12:13 -0500 Received: from mail270-va3-R.bigfish.com (10.7.14.237) by VA3EHSOBE002.bigfish.com (10.7.40.22) with Microsoft SMTP Server id 14.1.225.23; Fri, 14 Dec 2012 02:12:13 +0000 Received: from mail270-va3 (localhost [127.0.0.1]) by mail270-va3-R.bigfish.com (Postfix) with ESMTP id 1595A1940191; Fri, 14 Dec 2012 02:12:13 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1de0h1202h1e76h1d1ah1d2ahzz8275bhz2dh2a8h668h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1155h) Received: from mail270-va3 (localhost.localdomain [127.0.0.1]) by mail270-va3 (MessageSwitch) id 1355451131196901_22133; Fri, 14 Dec 2012 02:12:11 +0000 (UTC) Received: from VA3EHSMHS024.bigfish.com (unknown [10.7.14.245]) by mail270-va3.bigfish.com (Postfix) with ESMTP id 2DAFB1040077; Fri, 14 Dec 2012 02:12:11 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by VA3EHSMHS024.bigfish.com (10.7.99.34) with Microsoft SMTP Server (TLS) id 14.1.225.23; Fri, 14 Dec 2012 02:12:11 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-003.039d.mgd.msft.net (10.84.1.16) with Microsoft SMTP Server (TLS) id 14.2.318.3; Fri, 14 Dec 2012 02:12:10 +0000 Received: from snotra.am.freescale.net ([10.214.86.99]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id qBE2C4t2019223; Thu, 13 Dec 2012 19:12:08 -0700 From: Scott Wood To: Alexander Graf Date: Thu, 13 Dec 2012 20:12:02 -0600 Message-ID: <1355451124-2559-5-git-send-email-scottwood@freescale.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1355451124-2559-1-git-send-email-scottwood@freescale.com> References: <1355451124-2559-1-git-send-email-scottwood@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 X-Received-From: 216.32.180.12 Cc: Scott Wood , qemu-ppc@nongnu.org, qemu-devel@nongnu.org Subject: [Qemu-devel] [PATCH 4/6] openpic: don't crash on a register access without a CPU context X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org If we access a register via the QEMU memory inspection commands (e.g. "xp") rather than from guest code, we won't have a CPU context. Gracefully fail to access the register in that case, rather than crashing. Signed-off-by: Scott Wood --- hw/openpic.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/hw/openpic.c b/hw/openpic.c index 8c3f04d..c57a168 100644 --- a/hw/openpic.c +++ b/hw/openpic.c @@ -161,7 +161,11 @@ static inline int test_bit(uint32_t *field, int bit) static int get_current_cpu(void) { - return cpu_single_env->cpu_index; + if (!cpu_single_env) { + return -1; + } + + return cpu_single_env->cpu_index; } static uint32_t openpic_cpu_read_internal(void *opaque, hwaddr addr, @@ -797,6 +801,11 @@ static void openpic_cpu_write_internal(void *opaque, hwaddr addr, DPRINTF("%s: cpu %d addr " TARGET_FMT_plx " <= %08x\n", __func__, idx, addr, val); + + if (idx < 0) { + return; + } + if (addr & 0xF) return; dst = &opp->dst[idx]; @@ -862,6 +871,11 @@ static uint32_t openpic_cpu_read_internal(void *opaque, hwaddr addr, DPRINTF("%s: cpu %d addr " TARGET_FMT_plx "\n", __func__, idx, addr); retval = 0xFFFFFFFF; + + if (idx < 0) { + return retval; + } + if (addr & 0xF) return retval; dst = &opp->dst[idx];