Patchwork [U-Boot] EXYNOS4: Add pinmux support for SROMC

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Submitter Jeong-Hyeon Kim
Date Dec. 13, 2012, 6:24 a.m.
Message ID <1355379855-20181-1-git-send-email-jhkim@insignal.co.kr>
Download mbox | patch
Permalink /patch/205774/
State Not Applicable
Delegated to: Minkyu Kang
Headers show

Comments

Jeong-Hyeon Kim - Dec. 13, 2012, 6:24 a.m.
This patch adds pinumx support for SROMC.

Signed-off-by: Jeong-Hyeon Kim <jhkim@insignal.co.kr>
---
 arch/arm/cpu/armv7/exynos/pinmux.c |   77 ++++++++++++++++++++++++++++++++++++
 1 file changed, 77 insertions(+)

Patch

diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c
index d778b46..cdd6ad8 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -401,6 +401,79 @@  static void exynos4_uart_config(int peripheral)
 	}
 }
 
+static void exynos4_sromc_config(int flags)
+{
+	struct exynos4_gpio_part2 *gpio2 =
+		(struct exynos4_gpio_part2 *) samsung_get_base_gpio_part2();
+	int i;
+
+	/*
+	 * SROM:CS1 and EBI
+	 *
+	 * GPY0[0]	SROM_CSn[0]
+	 * GPY0[1]	SROM_CSn[1](2)
+	 * GPY0[2]	SROM_CSn[2]
+	 * GPY0[3]	SROM_CSn[3]
+	 * GPY0[4]	EBI_OEn(2)
+	 * GPY0[5]	EBI_EEn(2)
+	 *
+	 * GPY1[0]	EBI_BEn[0](2)
+	 * GPY1[1]	EBI_BEn[1](2)
+	 * GPY1[2]	SROM_WAIT(2)
+	 * GPY1[3]	EBI_DATA_RDn(2)
+	 */
+	s5p_gpio_cfg_pin(&gpio2->y0, (flags & PINMUX_FLAG_BANK),
+				GPIO_FUNC(2));
+	s5p_gpio_cfg_pin(&gpio2->y0, 4, GPIO_FUNC(2));
+	s5p_gpio_cfg_pin(&gpio2->y0, 5, GPIO_FUNC(2));
+
+	for (i = 0; i < 4; i++)
+		s5p_gpio_cfg_pin(&gpio2->y1, i, GPIO_FUNC(2));
+
+	/*
+	 * EBI: 8 Addrss Lines
+	 *
+	 * GPY3[0]	EBI_ADDR[0](2)
+	 * GPY3[1]	EBI_ADDR[1](2)
+	 * GPY3[2]	EBI_ADDR[2](2)
+	 * GPY3[3]	EBI_ADDR[3](2)
+	 * GPY3[4]	EBI_ADDR[4](2)
+	 * GPY3[5]	EBI_ADDR[5](2)
+	 * GPY3[6]	EBI_ADDR[6](2)
+	 * GPY3[7]	EBI_ADDR[7](2)
+	 *
+	 * EBI: 16 Data Lines
+	 *
+	 * GPY5[0]	EBI_DATA[0](2)
+	 * GPY5[1]	EBI_DATA[1](2)
+	 * GPY5[2]	EBI_DATA[2](2)
+	 * GPY5[3]	EBI_DATA[3](2)
+	 * GPY5[4]	EBI_DATA[4](2)
+	 * GPY5[5]	EBI_DATA[5](2)
+	 * GPY5[6]	EBI_DATA[6](2)
+	 * GPY5[7]	EBI_DATA[7](2)
+	 *
+	 * GPY6[0]	EBI_DATA[8](2)
+	 * GPY6[1]	EBI_DATA[9](2)
+	 * GPY6[2]	EBI_DATA[10](2)
+	 * GPY6[3]	EBI_DATA[11](2)
+	 * GPY6[4]	EBI_DATA[12](2)
+	 * GPY6[5]	EBI_DATA[13](2)
+	 * GPY6[6]	EBI_DATA[14](2)
+	 * GPY6[7]	EBI_DATA[15](2)
+	 */
+	for (i = 0; i < 8; i++) {
+		s5p_gpio_cfg_pin(&gpio2->y3, i, GPIO_FUNC(2));
+		s5p_gpio_set_pull(&gpio2->y3, i, GPIO_PULL_UP);
+
+		s5p_gpio_cfg_pin(&gpio2->y5, i, GPIO_FUNC(2));
+		s5p_gpio_set_pull(&gpio2->y5, i, GPIO_PULL_UP);
+
+		s5p_gpio_cfg_pin(&gpio2->y6, i, GPIO_FUNC(2));
+		s5p_gpio_set_pull(&gpio2->y6, i, GPIO_PULL_UP);
+	}
+}
+
 static void exynos4_i2c_config(int peripheral, int flags)
 {
 
@@ -459,6 +532,10 @@  static int exynos4_pinmux_config(int peripheral, int flags)
 	case PERIPH_ID_UART2:
 	case PERIPH_ID_UART3:
 		exynos4_uart_config(peripheral);
+		break;
+	case PERIPH_ID_SROMC:
+		exynos4_sromc_config(flags);
+		break;
 	case PERIPH_ID_I2C0:
 	case PERIPH_ID_I2C1:
 	case PERIPH_ID_I2C2: