From patchwork Wed Dec 12 06:29:32 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [1/2] omap_i2c: Clear SBD bit in STAT register on DATA read Date: Tue, 11 Dec 2012 20:29:32 -0000 From: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 205443 Message-Id: <1355293773-18361-2-git-send-email-andreas.faerber@web.de> To: qemu-devel@nongnu.org Cc: Peter Maydell , Blue Swirl , Alex Horn , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Anthony Liguori After reading a single-byte I2C response such as the tmp105's response to 0x01 0x00, the SBD status bit would not get reset on next read, still indicating validity of only a single byte. Clear it on next word read. Signed-off-by: Andreas Färber --- hw/omap_i2c.c | 1 + 1 Datei geändert, 1 Zeile hinzugefügt(+) diff --git a/hw/omap_i2c.c b/hw/omap_i2c.c index ba08e64..308c088 100644 --- a/hw/omap_i2c.c +++ b/hw/omap_i2c.c @@ -196,6 +196,7 @@ static uint32_t omap_i2c_read(void *opaque, hwaddr addr) s->stat |= 1 << 15; /* SBD */ s->rxlen = 0; } else if (s->rxlen > 1) { + s->stat &= ~(1 << 15); /* SBD */ if (s->rxlen > 2) s->fifo >>= 16; s->rxlen -= 2;