From patchwork Wed Dec 12 05:10:37 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [3.5.y.z, extended, stable] Patch "drm/radeon: fix typo in evergreen_mc_resume()" has been added to staging queue From: Herton Ronaldo Krzesinski X-Patchwork-Id: 205399 Message-Id: <1355289037-30553-1-git-send-email-herton.krzesinski@canonical.com> To: Alex Deucher Cc: Dave Airlie , kernel-team@lists.ubuntu.com, =?UTF-8?q?Michel=20D=C3=A4nzer?= Date: Wed, 12 Dec 2012 03:10:37 -0200 This is a note to let you know that I have just added a patch titled drm/radeon: fix typo in evergreen_mc_resume() to the linux-3.5.y-queue branch of the 3.5.y.z extended stable tree which can be found at: http://kernel.ubuntu.com/git?p=ubuntu/linux.git;a=shortlog;h=refs/heads/linux-3.5.y-queue If you, or anyone else, feels it should not be added to this tree, please reply to this email. For more information about the 3.5.y.z tree, see https://wiki.ubuntu.com/Kernel/Dev/ExtendedStable Thanks. -Herton ------ >From d9fcd76a5d71fee8aed388e0a23a0406f4891895 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Mon, 5 Nov 2012 16:34:58 +0000 Subject: [PATCH] drm/radeon: fix typo in evergreen_mc_resume() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit commit 695ddeb457584a602f2ba117d08ce37cf6ec1589 upstream. Add missing index that may have led us to enabling more crtcs than necessary. May also fix: https://bugs.freedesktop.org/show_bug.cgi?id=56139 Signed-off-by: Alex Deucher Reviewed-by: Michel Dänzer Signed-off-by: Dave Airlie Signed-off-by: Herton Ronaldo Krzesinski --- drivers/gpu/drm/radeon/evergreen.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 1.7.9.5 diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index cb7d2e0..9c61b96 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -1208,7 +1208,7 @@ void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *s WREG32(BIF_FB_EN, FB_READ_EN | FB_WRITE_EN); for (i = 0; i < rdev->num_crtc; i++) { - if (save->crtc_enabled) { + if (save->crtc_enabled[i]) { if (ASIC_IS_DCE6(rdev)) { tmp = RREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i]); tmp |= EVERGREEN_CRTC_BLANK_DATA_EN;