Patchwork [3.5.y.z,extended,stable] Patch "sparc64: Fix bit twiddling in sparc_pmu_enable_event()." has been added to staging queue

mail settings
Submitter Herton Ronaldo Krzesinski
Date Dec. 12, 2012, 5:09 a.m.
Message ID <>
Download mbox | patch
Permalink /patch/205381/
State New
Headers show


Herton Ronaldo Krzesinski - Dec. 12, 2012, 5:09 a.m.
This is a note to let you know that I have just added a patch titled

    sparc64: Fix bit twiddling in sparc_pmu_enable_event().

to the linux-3.5.y-queue branch of the 3.5.y.z extended stable tree 
which can be found at:;a=shortlog;h=refs/heads/linux-3.5.y-queue

If you, or anyone else, feels it should not be added to this tree, please 
reply to this email.

For more information about the 3.5.y.z tree, see



From bb842de60c67703d45e1d05c9cbef179d4bd626d Mon Sep 17 00:00:00 2001
From: "David S. Miller" <>
Date: Tue, 16 Oct 2012 13:05:25 -0700
Subject: [PATCH] sparc64: Fix bit twiddling in sparc_pmu_enable_event().

commit e793d8c6740f8fe704fa216e95685f4d92c4c4b9 upstream.

There was a serious disconnect in the logic happening in
sparc_pmu_disable_event() vs. sparc_pmu_enable_event().

Event disable is implemented by programming a NOP event into the PCR.

However, event enable was not reversing this operation.  Instead, it
was setting the User/Priv/Hypervisor trace enable bits.

That's not sparc_pmu_enable_event()'s job, that's what
sparc_pmu_enable() and sparc_pmu_disable() do .

The intent of sparc_pmu_enable_event() is clear, since it first clear
out the event type encoding field.  So fix this by OR'ing in the event
encoding rather than the trace enable bits.

Signed-off-by: David S. Miller <>
Signed-off-by: Herton Ronaldo Krzesinski <>
 arch/sparc/kernel/perf_event.c |    6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)



diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c
index b0cce26..ac18037 100644
--- a/arch/sparc/kernel/perf_event.c
+++ b/arch/sparc/kernel/perf_event.c
@@ -557,11 +557,13 @@  static u64 nop_for_index(int idx)

 static inline void sparc_pmu_enable_event(struct cpu_hw_events *cpuc, struct hw_perf_event *hwc, int idx)
-	u64 val, mask = mask_for_index(idx);
+	u64 enc, val, mask = mask_for_index(idx);
+	enc = perf_event_get_enc(cpuc->events[idx]);

 	val = cpuc->pcr;
 	val &= ~mask;
-	val |= hwc->config;
+	val |= event_encoding(enc, idx);
 	cpuc->pcr = val;