[U-Boot,v3,1/2] ARM: cache: introduce weak arm_setup_identity_mapping

Submitted by Vincent Stehlé on Dec. 11, 2012, 4:06 p.m.

Details

Message ID 1355241981-13752-2-git-send-email-v-stehle@ti.com
State Superseded
Delegated to: Tom Rini
Headers show

Commit Message

Vincent Stehlé Dec. 11, 2012, 4:06 p.m.
Separate the MMU identity mapping for ARM in a weak function, to allow
redefinition with platform specific function.

This is motivated by the need to unmap the region near address zero on HS OMAP
devices, to avoid speculative accesses. Accessing this region causes security
violations, which we want to avoid.

Signed-off-by: Vincent Stehlé <v-stehle@ti.com>
Cc: Tom Rini <trini@ti.com>
---
Changes for v3:
  - Add definition of __arm_setup_identity_mapping() into asm/cache.h
  - Fix comments style

 arch/arm/include/asm/cache.h |    1 +
 arch/arm/lib/cache-cp15.c    |   22 +++++++++++++++++++---
 2 files changed, 20 insertions(+), 3 deletions(-)

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diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
index eef6a5a..328377b 100644
--- a/arch/arm/include/asm/cache.h
+++ b/arch/arm/include/asm/cache.h
@@ -41,6 +41,7 @@  static inline void invalidate_l2_cache(void)
 
 void l2_cache_enable(void);
 void l2_cache_disable(void);
+void __arm_setup_identity_mapping(u32 *page_table);
 
 /*
  * The current upper bound for ARM L1 data cache line sizes is 64 bytes.  We
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index 939de10..f785ff5 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -23,6 +23,8 @@ 
 
 #include <common.h>
 #include <asm/system.h>
+#include <asm/cache.h>
+#include <linux/compiler.h>
 
 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
 
@@ -40,6 +42,17 @@  void __arm_init_before_mmu(void)
 void arm_init_before_mmu(void)
 	__attribute__((weak, alias("__arm_init_before_mmu")));
 
+void __arm_setup_identity_mapping(u32 *page_table)
+{
+	int i;
+
+	/* Set up an identity-mapping for all 4GB, rw for everyone */
+	for (i = 0; i < 4096; i++)
+		page_table[i] = i << 20 | (3 << 10) | 0x12;
+}
+__weak void arm_setup_identity_mapping(u32 *page_table)
+	__attribute__((alias("__arm_setup_identity_mapping")));
+
 static void cp_delay (void)
 {
 	volatile int i;
@@ -72,9 +85,12 @@  static inline void mmu_setup(void)
 	u32 reg;
 
 	arm_init_before_mmu();
-	/* Set up an identity-mapping for all 4GB, rw for everyone */
-	for (i = 0; i < 4096; i++)
-		page_table[i] = i << 20 | (3 << 10) | 0x12;
+
+	/*
+	 * Set up an identity-mapping. Default version maps all 4GB rw for
+	 * everyone
+	 */
+	arm_setup_identity_mapping(page_table);
 
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 		dram_bank_mmu_setup(i);