From patchwork Mon Dec 10 02:22:24 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: liguang X-Patchwork-Id: 204811 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 2B6342C0253 for ; Mon, 10 Dec 2012 13:25:48 +1100 (EST) Received: from localhost ([::1]:52075 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tht3y-0000GC-9Z for incoming@patchwork.ozlabs.org; Sun, 09 Dec 2012 21:25:46 -0500 Received: from eggs.gnu.org ([208.118.235.92]:38250) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tht3M-0007Cc-3W for qemu-devel@nongnu.org; Sun, 09 Dec 2012 21:25:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Tht3K-00064S-7f for qemu-devel@nongnu.org; Sun, 09 Dec 2012 21:25:08 -0500 Received: from [222.73.24.84] (port=54683 helo=song.cn.fujitsu.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tht3J-0005yq-G1 for qemu-devel@nongnu.org; Sun, 09 Dec 2012 21:25:06 -0500 X-IronPort-AV: E=Sophos;i="4.84,249,1355068800"; d="scan'208";a="6362480" Received: from unknown (HELO tang.cn.fujitsu.com) ([10.167.250.3]) by song.cn.fujitsu.com with ESMTP; 10 Dec 2012 10:23:10 +0800 Received: from fnstmail02.fnst.cn.fujitsu.com (tang.cn.fujitsu.com [127.0.0.1]) by tang.cn.fujitsu.com (8.14.3/8.13.1) with ESMTP id qBA2PWMg019133; Mon, 10 Dec 2012 10:25:32 +0800 Received: from liguang.fnst.cn.fujitsu.com ([10.167.225.128]) by fnstmail02.fnst.cn.fujitsu.com (Lotus Domino Release 8.5.3) with ESMTP id 2012121010241449-317652 ; Mon, 10 Dec 2012 10:24:14 +0800 From: liguang To: ehabkost@redhat.com, imammedo@redhat.com, afaerber@suse.de, qemu-devel@nongnu.org Date: Mon, 10 Dec 2012 10:22:24 +0800 Message-Id: <1355106144-30846-3-git-send-email-lig.fnst@cn.fujitsu.com> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1355106144-30846-1-git-send-email-lig.fnst@cn.fujitsu.com> References: <1355106144-30846-1-git-send-email-lig.fnst@cn.fujitsu.com> X-MIMETrack: Itemize by SMTP Server on mailserver/fnst(Release 8.5.3|September 15, 2011) at 2012/12/10 10:24:14, Serialize by Router on mailserver/fnst(Release 8.5.3|September 15, 2011) at 2012/12/10 10:24:14, Serialize complete at 2012/12/10 10:24:14 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 222.73.24.84 Cc: liguang Subject: [Qemu-devel] [PATCH v4 3/3] target-i386:slightly refactor dr7 related function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: liguang --- target-i386/helper.c | 74 +++++++++++++++++++++++++++++--------------- target-i386/machine.c | 5 ++- target-i386/misc_helper.c | 4 +- target-i386/seg_helper.c | 7 ++-- 4 files changed, 58 insertions(+), 32 deletions(-) diff --git a/target-i386/helper.c b/target-i386/helper.c index bf206cf..62746c5 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -966,30 +966,33 @@ hwaddr cpu_get_phys_page_debug(CPUX86State *env, target_ulong addr) void hw_breakpoint_insert(CPUX86State *env, int index) { - int type, err = 0; + int type = 0, err = 0; switch (hw_breakpoint_type(env->dr[7], index)) { - case 0: - if (hw_breakpoint_enabled(env->dr[7], index)) + case DR7_TYPE_BP_INST: + if (hw_breakpoint_enabled(env->dr[7], index)) { err = cpu_breakpoint_insert(env, env->dr[index], BP_CPU, &env->cpu_breakpoint[index]); + } break; - case 1: + case DR7_TYPE_DATA_WR: type = BP_CPU | BP_MEM_WRITE; - goto insert_wp; - case 2: - /* No support for I/O watchpoints yet */ break; - case 3: + case DR7_TYPE_DATA_RW: type = BP_CPU | BP_MEM_ACCESS; - insert_wp: + break; + case DR7_TYPE_IO_RW: + /* No support for I/O watchpoints yet */ + break; + } + if (type) { err = cpu_watchpoint_insert(env, env->dr[index], hw_breakpoint_len(env->dr[7], index), type, &env->cpu_watchpoint[index]); - break; } - if (err) + if (err) { env->cpu_breakpoint[index] = NULL; + } } void hw_breakpoint_remove(CPUX86State *env, int index) @@ -997,15 +1000,16 @@ void hw_breakpoint_remove(CPUX86State *env, int index) if (!env->cpu_breakpoint[index]) return; switch (hw_breakpoint_type(env->dr[7], index)) { - case 0: - if (hw_breakpoint_enabled(env->dr[7], index)) + case DR7_TYPE_BP_INST: + if (hw_breakpoint_enabled(env->dr[7], index)) { cpu_breakpoint_remove_by_ref(env, env->cpu_breakpoint[index]); + } break; - case 1: - case 3: + case DR7_TYPE_DATA_RW: + case DR7_TYPE_DATA_WR: cpu_watchpoint_remove_by_ref(env, env->cpu_watchpoint[index]); break; - case 2: + case DR7_TYPE_IO_RW: /* No support for I/O watchpoints yet */ break; } @@ -1014,22 +1018,42 @@ void hw_breakpoint_remove(CPUX86State *env, int index) int check_hw_breakpoints(CPUX86State *env, int force_dr6_update) { target_ulong dr6; - int reg, type; + int index; int hit_enabled = 0; + bool bp_match = false; + bool wp_match = false; dr6 = env->dr[6] & ~0xf; - for (reg = 0; reg < 4; reg++) { - type = hw_breakpoint_type(env->dr[7], reg); - if ((type == 0 && env->dr[reg] == env->eip) || - ((type & 1) && env->cpu_watchpoint[reg] && - (env->cpu_watchpoint[reg]->flags & BP_WATCHPOINT_HIT))) { - dr6 |= 1 << reg; - if (hw_breakpoint_enabled(env->dr[7], reg)) + for (index = 0; index < DR7_MAX_BP; index++) { + switch (hw_breakpoint_type(env->dr[7], index)) { + case DR7_TYPE_BP_INST: + if (env->dr[index] == env->eip) { + bp_match = true; + } + break; + case DR7_TYPE_DATA_WR: + case DR7_TYPE_DATA_RW: + if (env->cpu_watchpoint[index] && + env->cpu_watchpoint[index]->flags & BP_WATCHPOINT_HIT) { + wp_match = true; + } + break; + case DR7_TYPE_IO_RW: + break; + } + if (bp_match || wp_match) { + dr6 |= 1 << index; + if (hw_breakpoint_enabled(env->dr[7], index)) { hit_enabled = 1; + } + bp_match = false; + wp_match = false; } } - if (hit_enabled || force_dr6_update) + if (hit_enabled || force_dr6_update) { env->dr[6] = dr6; + } + return hit_enabled; } diff --git a/target-i386/machine.c b/target-i386/machine.c index 4771508..67131a4 100644 --- a/target-i386/machine.c +++ b/target-i386/machine.c @@ -265,10 +265,11 @@ static int cpu_post_load(void *opaque, int version_id) cpu_breakpoint_remove_all(env, BP_CPU); cpu_watchpoint_remove_all(env, BP_CPU); - for (i = 0; i < 4; i++) + for (i = 0; i < DR7_MAX_BP; i++) { hw_breakpoint_insert(env, i); - + } tlb_flush(env, 1); + return 0; } diff --git a/target-i386/misc_helper.c b/target-i386/misc_helper.c index a020379..5ee0863 100644 --- a/target-i386/misc_helper.c +++ b/target-i386/misc_helper.c @@ -197,11 +197,11 @@ void helper_movl_drN_T0(CPUX86State *env, int reg, target_ulong t0) env->dr[reg] = t0; hw_breakpoint_insert(env, reg); } else if (reg == 7) { - for (i = 0; i < 4; i++) { + for (i = 0; i < DR7_MAX_BP; i++) { hw_breakpoint_remove(env, i); } env->dr[7] = t0; - for (i = 0; i < 4; i++) { + for (i = 0; i < DR7_MAX_BP; i++) { hw_breakpoint_insert(env, i); } } else { diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c index ff93374..306e9d1 100644 --- a/target-i386/seg_helper.c +++ b/target-i386/seg_helper.c @@ -465,9 +465,10 @@ static void switch_tss(CPUX86State *env, int tss_selector, #ifndef CONFIG_USER_ONLY /* reset local breakpoints */ - if (env->dr[7] & 0x55) { - for (i = 0; i < 4; i++) { - if (hw_breakpoint_enabled(env->dr[7], i) == 0x1) { + if (env->dr[7] & DR7_LOCAL_BP_MASK) { + for (i = 0; i < DR7_MAX_BP; i++) { + if (hw_local_breakpoint_enabled(env->dr[7], i) && + !hw_global_breakpoint_enabled(env->dr[7], i)) { hw_breakpoint_remove(env, i); } }