From patchwork Sat Dec 8 13:44:36 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 204666 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 333BA2C0084 for ; Sun, 9 Dec 2012 02:10:57 +1100 (EST) Received: from localhost ([::1]:37882 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ThKjh-0006mK-Fl for incoming@patchwork.ozlabs.org; Sat, 08 Dec 2012 08:46:33 -0500 Received: from eggs.gnu.org ([208.118.235.92]:57999) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ThKij-0005E8-2y for qemu-devel@nongnu.org; Sat, 08 Dec 2012 08:45:39 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ThKie-0002Fs-Dl for qemu-devel@nongnu.org; Sat, 08 Dec 2012 08:45:32 -0500 Received: from cantor2.suse.de ([195.135.220.15]:36553 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ThKie-0002Ee-4g; Sat, 08 Dec 2012 08:45:28 -0500 Received: from relay2.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id A7E7DA4FFA; Sat, 8 Dec 2012 14:44:48 +0100 (CET) From: Alexander Graf To: "qemu-ppc@nongnu.org List" Date: Sat, 8 Dec 2012 14:44:36 +0100 Message-Id: <1354974282-1915-14-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.6.0.2 In-Reply-To: <1354974282-1915-1-git-send-email-agraf@suse.de> References: <1354974282-1915-1-git-send-email-agraf@suse.de> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 195.135.220.15 Cc: qemu-devel qemu-devel Subject: [Qemu-devel] [PATCH 13/19] openpic: remove irq_out X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The current openpic emulation contains half-ready code for bypass mode. Remove it, so that when someone wants to finish it they can start from a clean state. Signed-off-by: Alexander Graf --- hw/openpic.c | 8 ++------ hw/openpic.h | 4 ++-- hw/ppc/e500.c | 2 +- hw/ppc_newworld.c | 2 +- 4 files changed, 6 insertions(+), 10 deletions(-) diff --git a/hw/openpic.c b/hw/openpic.c index f3e53b6..321c6d4 100644 --- a/hw/openpic.c +++ b/hw/openpic.c @@ -236,8 +236,6 @@ typedef struct OpenPICState { uint32_t ticc; /* Global timer current count register */ uint32_t tibc; /* Global timer base count register */ } timers[MAX_TMR]; - /* IRQ out is used when in bypass mode (not implemented) */ - qemu_irq irq_out; int max_irq; int irq_ipi0; int irq_tim0; @@ -1050,7 +1048,7 @@ static void openpic_irq_raise(OpenPICState *opp, int n_CPU, IRQ_src_t *src) } qemu_irq *openpic_init (MemoryRegion **pmem, int nb_cpus, - qemu_irq **irqs, qemu_irq irq_out) + qemu_irq **irqs) { OpenPICState *opp; int i; @@ -1099,7 +1097,6 @@ qemu_irq *openpic_init (MemoryRegion **pmem, int nb_cpus, for (i = 0; i < nb_cpus; i++) opp->dst[i].irqs = irqs[i]; - opp->irq_out = irq_out; register_savevm(&opp->pci_dev.qdev, "openpic", 0, 2, openpic_save, openpic_load, opp); @@ -1112,7 +1109,7 @@ qemu_irq *openpic_init (MemoryRegion **pmem, int nb_cpus, } qemu_irq *mpic_init (MemoryRegion *address_space, hwaddr base, - int nb_cpus, qemu_irq **irqs, qemu_irq irq_out) + int nb_cpus, qemu_irq **irqs) { OpenPICState *mpp; int i; @@ -1158,7 +1155,6 @@ qemu_irq *mpic_init (MemoryRegion *address_space, hwaddr base, for (i = 0; i < nb_cpus; i++) mpp->dst[i].irqs = irqs[i]; - mpp->irq_out = irq_out; /* Enable critical interrupt support */ mpp->flags |= OPENPIC_FLAG_IDE_CRIT; diff --git a/hw/openpic.h b/hw/openpic.h index 1232d10..8a68f20 100644 --- a/hw/openpic.h +++ b/hw/openpic.h @@ -15,7 +15,7 @@ enum { #define OPENPIC_FLAG_IDE_CRIT (1 << 0) qemu_irq *openpic_init (MemoryRegion **pmem, int nb_cpus, - qemu_irq **irqs, qemu_irq irq_out); + qemu_irq **irqs); qemu_irq *mpic_init (MemoryRegion *address_space, hwaddr base, - int nb_cpus, qemu_irq **irqs, qemu_irq irq_out); + int nb_cpus, qemu_irq **irqs); #endif /* __OPENPIC_H__ */ diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index f3e97d8..3f6d58c 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -493,7 +493,7 @@ void ppce500_init(PPCE500Params *params) /* MPIC */ mpic = mpic_init(ccsr_addr_space, MPC8544_MPIC_REGS_OFFSET, - smp_cpus, irqs, NULL); + smp_cpus, irqs); if (!mpic) { cpu_abort(env, "MPIC failed to initialize\n"); diff --git a/hw/ppc_newworld.c b/hw/ppc_newworld.c index 664747e..b9c2cd8 100644 --- a/hw/ppc_newworld.c +++ b/hw/ppc_newworld.c @@ -320,7 +320,7 @@ static void ppc_core99_init(QEMUMachineInitArgs *args) exit(1); } } - pic = openpic_init(&pic_mem, smp_cpus, openpic_irqs, NULL); + pic = openpic_init(&pic_mem, smp_cpus, openpic_irqs); if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) { /* 970 gets a U3 bus */ pci_bus = pci_pmac_u3_init(pic, get_system_memory(), get_system_io());