diff mbox

[10/19] openpic: remove unused type variable

Message ID 1354974282-1915-11-git-send-email-agraf@suse.de
State New
Headers show

Commit Message

Alexander Graf Dec. 8, 2012, 1:44 p.m. UTC 
The openpic source irqs are carrying around a type indicator that
is never accessed by anything. Remove it.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 hw/openpic.c |   27 ++-------------------------
 1 files changed, 2 insertions(+), 25 deletions(-)

Comments

Scott Wood Dec. 10, 2012, 11:42 p.m. UTC | #1 
On 12/08/2012 07:44:33 AM, Alexander Graf wrote:
> The openpic source irqs are carrying around a type indicator that
> is never accessed by anything. Remove it.
> 
> Signed-off-by: Alexander Graf <agraf@suse.de>
> ---
>  hw/openpic.c |   27 ++-------------------------
>  1 files changed, 2 insertions(+), 25 deletions(-)
> 
> diff --git a/hw/openpic.c b/hw/openpic.c
> index e4ef23d..d252b2b 100644
> --- a/hw/openpic.c
> +++ b/hw/openpic.c
> @@ -167,13 +167,6 @@ static uint32_t openpic_cpu_read_internal(void  
> *opaque, hwaddr addr,
>  static void openpic_cpu_write_internal(void *opaque, hwaddr addr,
>                                         uint32_t val, int idx);
> 
> -enum {
> -    IRQ_EXTERNAL = 0x01,
> -    IRQ_INTERNAL = 0x02,
> -    IRQ_TIMER    = 0x04,
> -    IRQ_SPECIAL  = 0x08,
> -};

We may want to distinguish based on something like this in the future  
-- for example, internal interrupts on FSL MPIC don't have a "sense"  
bit.

-Scott
Alexander Graf Dec. 11, 2012, 8:17 a.m. UTC | #2 
On 11.12.2012, at 00:42, Scott Wood <scottwood@freescale.com> wrote:

> On 12/08/2012 07:44:33 AM, Alexander Graf wrote:
>> The openpic source irqs are carrying around a type indicator that
>> is never accessed by anything. Remove it.
>> Signed-off-by: Alexander Graf <agraf@suse.de>
>> ---
>> hw/openpic.c |   27 ++-------------------------
>> 1 files changed, 2 insertions(+), 25 deletions(-)
>> diff --git a/hw/openpic.c b/hw/openpic.c
>> index e4ef23d..d252b2b 100644
>> --- a/hw/openpic.c
>> +++ b/hw/openpic.c
>> @@ -167,13 +167,6 @@ static uint32_t openpic_cpu_read_internal(void *opaque, hwaddr addr,
>> static void openpic_cpu_write_internal(void *opaque, hwaddr addr,
>>                                        uint32_t val, int idx);
>> -enum {
>> -    IRQ_EXTERNAL = 0x01,
>> -    IRQ_INTERNAL = 0x02,
>> -    IRQ_TIMER    = 0x04,
>> -    IRQ_SPECIAL  = 0x08,
>> -};
> 
> We may want to distinguish based on something like this in the future -- for example, internal interrupts on FSL MPIC don't have a "sense" bit.

I would rather like to give irq lines flags than types then. An FSL MPIC could set a 'has no sense bit' flag in the irq line which means the sense bit is always masked out when written to.


Alex
diff mbox

Patch

diff --git a/hw/openpic.c b/hw/openpic.c
index e4ef23d..d252b2b 100644
--- a/hw/openpic.c
+++ b/hw/openpic.c
@@ -167,13 +167,6 @@  static uint32_t openpic_cpu_read_internal(void *opaque, hwaddr addr,
 static void openpic_cpu_write_internal(void *opaque, hwaddr addr,
                                        uint32_t val, int idx);
 
-enum {
-    IRQ_EXTERNAL = 0x01,
-    IRQ_INTERNAL = 0x02,
-    IRQ_TIMER    = 0x04,
-    IRQ_SPECIAL  = 0x08,
-};
-
 typedef struct IRQ_queue_t {
     uint32_t queue[BF_WIDTH(MAX_IRQ)];
     int next;
@@ -183,7 +176,6 @@  typedef struct IRQ_queue_t {
 typedef struct IRQ_src_t {
     uint32_t ipvp;  /* IRQ vector/priority register */
     uint32_t ide;   /* IRQ destination register */
-    int type;
     int last_cpu;
     int pending;    /* TRUE if IRQ is pending */
 } IRQ_src_t;
@@ -971,7 +963,6 @@  static void openpic_save(QEMUFile* f, void *opaque)
     for (i = 0; i < opp->max_irq; i++) {
         qemu_put_be32s(f, &opp->src[i].ipvp);
         qemu_put_be32s(f, &opp->src[i].ide);
-        qemu_put_sbe32s(f, &opp->src[i].type);
         qemu_put_sbe32s(f, &opp->src[i].last_cpu);
         qemu_put_sbe32s(f, &opp->src[i].pending);
     }
@@ -1021,7 +1012,6 @@  static int openpic_load(QEMUFile* f, void *opaque, int version_id)
     for (i = 0; i < opp->max_irq; i++) {
         qemu_get_be32s(f, &opp->src[i].ipvp);
         qemu_get_be32s(f, &opp->src[i].ide);
-        qemu_get_sbe32s(f, &opp->src[i].type);
         qemu_get_sbe32s(f, &opp->src[i].last_cpu);
         qemu_get_sbe32s(f, &opp->src[i].pending);
     }
@@ -1058,7 +1048,7 @@  qemu_irq *openpic_init (MemoryRegion **pmem, int nb_cpus,
                         qemu_irq **irqs, qemu_irq irq_out)
 {
     openpic_t *opp;
-    int i, m;
+    int i;
     struct {
         const char             *name;
         MemoryRegionOps const  *ops;
@@ -1101,20 +1091,7 @@  qemu_irq *openpic_init (MemoryRegion **pmem, int nb_cpus,
     opp->max_irq = OPENPIC_MAX_IRQ;
     opp->irq_ipi0 = OPENPIC_IRQ_IPI0;
     opp->irq_tim0 = OPENPIC_IRQ_TIM0;
-    /* Set IRQ types */
-    for (i = 0; i < OPENPIC_EXT_IRQ; i++) {
-        opp->src[i].type = IRQ_EXTERNAL;
-    }
-    for (; i < OPENPIC_IRQ_TIM0; i++) {
-        opp->src[i].type = IRQ_SPECIAL;
-    }
-    m = OPENPIC_IRQ_IPI0;
-    for (; i < m; i++) {
-        opp->src[i].type = IRQ_TIMER;
-    }
-    for (; i < OPENPIC_MAX_IRQ; i++) {
-        opp->src[i].type = IRQ_INTERNAL;
-    }
+
     for (i = 0; i < nb_cpus; i++)
         opp->dst[i].irqs = irqs[i];
     opp->irq_out = irq_out;