From patchwork Wed Dec 5 20:58:11 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [10/12] iwlwifi: collapse wrapper for pcie_capability_read_word() Date: Wed, 05 Dec 2012 10:58:11 -0000 From: Bjorn Helgaas X-Patchwork-Id: 203955 Message-Id: <20121205205811.13851.77247.stgit@bhelgaas.mtv.corp.google.com> To: linux-pci@vger.kernel.org Cc: Intel Linux Wireless , linux-wireless@vger.kernel.org, "John W. Linville" , Johannes Berg , Wey-Yi Guy iwl_pciexp_link_ctrl() has only one call site and no longer provides any useful abstraction, so collapse it into the caller. Signed-off-by: Bjorn Helgaas CC: "John W. Linville" CC: Johannes Berg CC: Wey-Yi Guy CC: Intel Linux Wireless CC: linux-wireless@vger.kernel.org --- drivers/net/wireless/iwlwifi/pcie/trans.c | 13 +++---------- 1 files changed, 3 insertions(+), 10 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/net/wireless/iwlwifi/pcie/trans.c b/drivers/net/wireless/iwlwifi/pcie/trans.c index fe0fffd..5cd06b3 100644 --- a/drivers/net/wireless/iwlwifi/pcie/trans.c +++ b/drivers/net/wireless/iwlwifi/pcie/trans.c @@ -673,18 +673,11 @@ static void iwl_set_pwr_vmain(struct iwl_trans *trans) #define PCI_CFG_LINK_CTRL_VAL_L0S_EN 0x01 #define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02 -static u16 iwl_pciexp_link_ctrl(struct iwl_trans *trans) +static void iwl_apm_config(struct iwl_trans *trans) { struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); - u16 pci_lnk_ctl; - - pcie_capability_read_word(trans_pcie->pci_dev, PCI_EXP_LNKCTL, - &pci_lnk_ctl); - return pci_lnk_ctl; -} + u16 lctl; -static void iwl_apm_config(struct iwl_trans *trans) -{ /* * HW bug W/A for instability in PCIe bus L0S->L1 transition. * Check if BIOS (or OS) enabled L1-ASPM on this device. @@ -693,8 +686,8 @@ static void iwl_apm_config(struct iwl_trans *trans) * If not (unlikely), enable L0S, so there is at least some * power savings, even without L1. */ - u16 lctl = iwl_pciexp_link_ctrl(trans); + pcie_capability_read_word(trans_pcie->pci_dev, PCI_EXP_LNKCTL, &lctl); if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN) { /* L1-ASPM enabled; disable(!) L0S */