From patchwork Wed Dec 5 13:31:35 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [U-Boot,2/4] MMC: EXYNOS: Added call back function for clock get From: Amar X-Patchwork-Id: 203867 Message-Id: <1354714297-11568-3-git-send-email-amarendra.xt@samsung.com> To: u-boot@lists.denx.de, jh80.chung@samsung.com Cc: afleming@gmail.com, patches@linaro.org Date: Wed, 05 Dec 2012 19:01:35 +0530 This patch defines the call back required by dw mmc driver to get the clock value. It also adds function to set the dw mmc clock divider ratio. Signed-off-by: Amarendra Reddy --- drivers/mmc/exynos_dw_mmc.c | 14 +++++++++++++- 1 files changed, 13 insertions(+), 1 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 72a31b7..7cc8aba 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -30,25 +30,37 @@ static void exynos_dwmci_clksel(struct dwmci_host *host) { u32 val; val = DWMCI_SET_SAMPLE_CLK(DWMCI_SHIFT_0) | - DWMCI_SET_DRV_CLK(DWMCI_SHIFT_0) | DWMCI_SET_DIV_RATIO(0); + DWMCI_SET_DRV_CLK(DWMCI_SHIFT_0) | + DWMCI_SET_DIV_RATIO(DWMCI_SHIFT_0); dwmci_writel(host, DWMCI_CLKSEL, val); } +unsigned int exynos_dwmci_get_clk(int dev_index) +{ + return get_mmc_clk(dev_index); +} + int exynos_dwmci_init(u32 regbase, int bus_width, int index) { struct dwmci_host *host = NULL; + int div = 0; host = malloc(sizeof(struct dwmci_host)); if (!host) { printf("dwmci_host malloc fail!\n"); return 1; } + div = 1; + /* Set the mmc clock divider ratio & pre-ratio */ + set_mmc_clk(index, div); + host->name = EXYNOS_NAME; host->ioaddr = (void *)regbase; host->buswidth = bus_width; host->clksel = exynos_dwmci_clksel; host->dev_index = index; + host->mmc_clk = exynos_dwmci_get_clk; add_dwmci(host, 52000000, 400000);