From patchwork Wed Dec 5 10:38:47 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajeshwari Birje X-Patchwork-Id: 203831 X-Patchwork-Delegate: promsoft@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id C4F652C0092 for ; Wed, 5 Dec 2012 21:33:55 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B79674A0C6; Wed, 5 Dec 2012 11:33:44 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id QFy76T6S-y1w; Wed, 5 Dec 2012 11:33:44 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 254C74A0FD; Wed, 5 Dec 2012 11:33:37 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5BCF04A0C2 for ; Wed, 5 Dec 2012 11:33:34 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id gRuKLkKNWr9G for ; Wed, 5 Dec 2012 11:33:32 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mailout2.samsung.com (mailout2.samsung.com [203.254.224.25]) by theia.denx.de (Postfix) with ESMTP id 4C5424A109 for ; Wed, 5 Dec 2012 11:33:12 +0100 (CET) Received: from epcpsbgm2.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MEJ002OFZY382Y0@mailout2.samsung.com> for u-boot@lists.denx.de; Wed, 05 Dec 2012 19:33:10 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.126]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id C6.2D.12699.6E22FB05; Wed, 05 Dec 2012 19:33:10 +0900 (KST) X-AuditID: cbfee61b-b7f616d00000319b-9c-50bf22e62e49 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 06.2D.12699.5E22FB05; Wed, 05 Dec 2012 19:33:09 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MEJ0057HZYM3V80@mmp1.samsung.com> for u-boot@lists.denx.de; Wed, 05 Dec 2012 19:33:09 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Date: Wed, 05 Dec 2012 16:08:47 +0530 Message-id: <1354703927-4786-5-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1354703927-4786-1-git-send-email-rajeshwari.s@samsung.com> References: <1354703927-4786-1-git-send-email-rajeshwari.s@samsung.com> DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrNLMWRmVeSWpSXmKPExsWyRsSkTveZ0v4Ag7Vv+Sze7u1kd2D0OHtn B2MAYxSXTUpqTmZZapG+XQJXxuenbxgLzitVrF//hqmBcYJ0FyMnh4SAicSRnsUsELaYxIV7 69m6GLk4hASWMkosXreRGabo58Xj7BCJRYwS6340sUI4q5gkZvc9ZQSpYhMwkth6chqYLSIg IfGr/yqYzSwQI/F6/w82EFtYwF7iYOsPsKksAqoSj1dMZ+pi5ODgFXCX+HpdFmKZgsSxqV9Z QcKcAh4SG5/LgISFgCpOfloH1Skg8W3yIRaQEgkBWYlNB5hBrpEQuM4m0bPzBSPEGEmJgytu sExgFF7AyLCKUTS1ILmgOCk910ivODG3uDQvXS85P3cTIzAET/97Jr2DcVWDxSFGAQ5GJR5e CeN9AUKsiWXFlbmHGCU4mJVEeOfJ7A8Q4k1JrKxKLcqPLyrNSS0+xOgDdMlEZinR5HxgfOSV xBsam5ibGptaGhmZmZriEFYS5232SAkQEkhPLEnNTk0tSC2CGcfEwSnVwJh72fzu/gVq9R5p num9x+eJL3Di2uk5XXh9z41E5eT8P2EvbgU+id73bktD68H3uid+1PEKdqpc32kiarR5Sfzs Ddaft4fr59+YbvMi0Y/d4cB1jcviNxUOnv+5OuPX7q85ge1bjxzeYWrWEHLuvfglsT/xxy7Y HdPoXr1n3cdTN55kGcaL736jxFKckWioxVxUnAgAjbzq/24CAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupikeLIzCtJLcpLzFFi42I5/e+xgO5Tpf0BBqu+6lm83dvJ7sDocfbO DsYAxqgGRpuM1MSU1CKF1Lzk/JTMvHRbJe/geOd4UzMDQ11DSwtzJYW8xNxUWyUXnwBdt8wc oLFKCmWJOaVAoYDE4mIlfTtME0JD3HQtYBojdH1DguB6jAzQQMIaxozPT98wFpxXqli//g1T A+ME6S5GTg4JAROJnxePs0PYYhIX7q1n62Lk4hASWMQose5HEyuEs4pJYnbfU0aQKjYBI4mt J6eB2SICEhK/+q+C2cwCMRKv9/9gA7GFBewlDrb+YAaxWQRUJR6vmM7UxcjBwSvgLvH1uizE MgWJY1O/soKEOQU8JDY+lwEJCwFVnPy0jnkCI+8CRoZVjKKpBckFxUnpuUZ6xYm5xaV56XrJ +bmbGMEB/kx6B+OqBotDjAIcjEo8vBLG+wKEWBPLiitzDzFKcDArifDOk9kfIMSbklhZlVqU H19UmpNafIjRB+imicxSosn5wOjLK4k3NDYxNzU2tTSxMDGzxCGsJM7b7JESICSQnliSmp2a WpBaBDOOiYNTqoFxy651Zz58vXzo4PvVD5ZcaZrN27G/3FX1fPQ0/22JijUza3kEv5W75apa lE+PP/RZ9Aen7t8pnPet76m+uvrr8KeYs1c/Ma3jn8Jwb8q5L2K/e61Pn83Xvvc3e4v/G5OH B/tfrS5M6NLPFndjvTzTfI7uv3WaCe66bf8WHpJL05t0JKwtaNl6XSWW4oxEQy3mouJEAHpH cp6dAgAA X-CFilter-Loop: Reflected Cc: patches@linaro.org Subject: [U-Boot] [PATCH 4/4 V2] SPI: EXYNOS: Add FDT support to driver. X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This patch adds FDT support to the SPI driver. Signed-off-by: Simon Glass Signed-off-by: Rajeshwari Shinde Acked-by: Simon Glass --- Changes in V2: - None. drivers/spi/exynos_spi.c | 96 +++++++++++++++++++++++++++++++++++++++++++--- 1 files changed, 90 insertions(+), 6 deletions(-) diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c index 3e6c18f..7ecc566 100644 --- a/drivers/spi/exynos_spi.c +++ b/drivers/spi/exynos_spi.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -28,16 +29,20 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + /* Information about each SPI controller */ struct spi_bus { enum periph_id periph_id; s32 frequency; /* Default clock frequency, -1 for none */ struct exynos_spi *regs; int inited; /* 1 if this bus is ready for use */ + int node; }; /* A list of spi buses that we know about */ static struct spi_bus spi_bus[EXYNOS5_SPI_NUM_CONTROLLERS]; +static unsigned int bus_count; struct exynos_spi_slave { struct spi_slave slave; @@ -50,7 +55,7 @@ struct exynos_spi_slave { static struct spi_bus *spi_get_bus(unsigned dev_index) { - if (dev_index < EXYNOS5_SPI_NUM_CONTROLLERS) + if (dev_index < bus_count) return &spi_bus[dev_index]; debug("%s: invalid bus %d", __func__, dev_index); @@ -347,21 +352,100 @@ static inline struct exynos_spi *get_spi_base(int dev_index) (dev_index - 3); } +/* + * Read the SPI config from the device tree node. + * + * @param blob FDT blob to read from + * @param node Node offset to read from + * @param bus SPI bus structure to fill with information + * @return 0 if ok, or -FDT_ERR_NOTFOUND if something was missing + */ +static int spi_get_config(const void *blob, int node, struct spi_bus *bus) +{ + bus->node = node; + bus->regs = (struct exynos_spi *)fdtdec_get_addr(blob, node, "reg"); + bus->periph_id = pinmux_decode_periph_id(blob, node); + if (bus->periph_id == PERIPH_ID_NONE) { + debug("%s: Invalid peripheral ID %d\n", __func__, + bus->periph_id); + return -FDT_ERR_NOTFOUND; + } + + /* Use 500KHz as a suitable default */ + bus->frequency = fdtdec_get_int(blob, node, "spi-max-frequency", + 500000); + + return 0; +} + + +/* + * Process a list of nodes, adding them to our list of SPI ports. + * + * @param blob fdt blob + * @param node_list list of nodes to process (any <=0 are ignored) + * @param count number of nodes to process + * @param is_dvc 1 if these are DVC ports, 0 if standard I2C + * @return 0 if ok, -1 on error + */ +static int process_nodes(const void *blob, int node_list[], int count) +{ + int i; + + /* build the i2c_controllers[] for each controller */ + for (i = 0; i < count; i++) { + int node = node_list[i]; + struct spi_bus *bus; + + if (node <= 0) + continue; + + bus = &spi_bus[i]; + if (spi_get_config(blob, node, bus)) { + printf("exynos spi_init: failed to decode bus %d\n", + i); + return -1; + } + + debug("spi: controller bus %d at %p, periph_id %d\n", + i, bus->regs, bus->periph_id); + bus->inited = 1; + bus_count++; + } + + return 0; +} + /* Sadly there is no error return from this function */ void spi_init(void) { - int i; + int count; + +#ifdef CONFIG_OF_CONTROL + int node_list[EXYNOS5_SPI_NUM_CONTROLLERS]; + const void *blob = gd->fdt_blob; + + count = fdtdec_find_aliases_for_id(blob, "spi", + COMPAT_SAMSUNG_EXYNOS_SPI, node_list, + EXYNOS5_SPI_NUM_CONTROLLERS); + if (process_nodes(blob, node_list, count)) + return; + +#else struct spi_bus *bus; - for (i = 0; i < EXYNOS5_SPI_NUM_CONTROLLERS; i++) { - bus = &spi_bus[i]; - bus->regs = get_spi_base(i); - bus->periph_id = PERIPH_ID_SPI0 + i; + for (count = 0; i < EXYNOS5_SPI_NUM_CONTROLLERS; i++) { + bus = &spi_bus[count]; + bus->regs = get_spi_base(count); + bus->periph_id = PERIPH_ID_SPI0 + count; /* Although Exynos5 supports upto 50Mhz speed, * we are setting it to 10Mhz for safe side */ bus->frequency = 10000000; bus->inited = 1; + bus->node = 0; + bus_count = EXYNOS5_SPI_NUM_CONTROLLERS; } +#endif }