From patchwork Wed Dec 5 06:46:11 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: cadance_uart: Accept input after rx FIFO pop Date: Tue, 04 Dec 2012 20:46:11 -0000 From: Peter Crosthwaite X-Patchwork-Id: 203789 Message-Id: <1354689971-21453-1-git-send-email-peter.crosthwaite@xilinx.com> To: qemu-devel@nongnu.org Cc: huanyu@xilinx.com, peter.maydell@linaro.org, Peter Crosthwaite , john.williams@xilinx.com The device return false from the can receive function when the FIFO is full. This mean the device should check for buffered input whenever a byte is popped from the FIFO. Reported-by: Jason Wu Signed-off-by: Peter Crosthwaite --- hw/cadence_uart.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/hw/cadence_uart.c b/hw/cadence_uart.c index 686e617..a6196a2 100644 --- a/hw/cadence_uart.c +++ b/hw/cadence_uart.c @@ -343,6 +343,7 @@ static void uart_read_rx_fifo(UartState *s, uint32_t *c) if (!s->rx_count) { s->r[R_SR] |= UART_SR_INTR_REMPTY; } + qemu_chr_accept_input(s->chr); } else { *c = 0; s->r[R_SR] |= UART_SR_INTR_REMPTY;