| Submitter | Peter Crosthwaite |
|---|---|
| Date | Dec. 5, 2012, 6:46 a.m. |
| Message ID | <1354689971-21453-1-git-send-email-peter.crosthwaite@xilinx.com> |
| Download | mbox | patch |
| Permalink | /patch/203789/ |
| State | New |
| Headers | show |
Comments
Patch
diff --git a/hw/cadence_uart.c b/hw/cadence_uart.c index 686e617..a6196a2 100644 --- a/hw/cadence_uart.c +++ b/hw/cadence_uart.c @@ -343,6 +343,7 @@ static void uart_read_rx_fifo(UartState *s, uint32_t *c) if (!s->rx_count) { s->r[R_SR] |= UART_SR_INTR_REMPTY; } + qemu_chr_accept_input(s->chr); } else { *c = 0; s->r[R_SR] |= UART_SR_INTR_REMPTY;
The device return false from the can receive function when the FIFO is full. This mean the device should check for buffered input whenever a byte is popped from the FIFO. Reported-by: Jason Wu <huanyu@xilinx.com> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> --- hw/cadence_uart.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)