From patchwork Tue Dec  4 13:46:47 2012
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Subject: [ARM] More Maverick obsoletion cleanup
Date: Tue, 04 Dec 2012 03:46:47 -0000
From: Richard Earnshaw <rearnsha@arm.com>
X-Patchwork-Id: 203635
Message-Id: <50BDFEC7.50505@arm.com>
To: gcc-patches <gcc-patches@gcc.gnu.org>

Another minor cleanup following the removal of the Cirrus Maverick
support.  Now that we no-longer support the Maverick instruction set
extensions, we no-longer need the option to fix up the breakage in early
implementations.  The code to do this went with the initial purge, but
the option managed to evade detection and lurked around a bit longer.
However, it's now been caught and sent to the bit-bucket...

	* arm.opt (cirrus-fix-invalid-insns): Delete option.
	* invoke.texi (cirrus-fix-invalid-insns): Remove documentation.

R.


Index: doc/invoke.texi
===================================================================
--- doc/invoke.texi	(revision 193943)
+++ doc/invoke.texi	(working copy)
@@ -506,7 +506,6 @@ Objective-C and Objective-C++ Dialects}.
 -msingle-pic-base  -mno-single-pic-base @gol
 -mpic-register=@var{reg} @gol
 -mnop-fun-dllimport @gol
--mcirrus-fix-invalid-insns -mno-cirrus-fix-invalid-insns @gol
 -mpoke-function-name @gol
 -mthumb  -marm @gol
 -mtpcs-frame  -mtpcs-leaf-frame @gol
@@ -11394,18 +11393,6 @@ before execution begins.
 Specify the register to be used for PIC addressing.  The default is R10
 unless stack-checking is enabled, when R9 is used.
 
-@item -mcirrus-fix-invalid-insns
-@opindex mcirrus-fix-invalid-insns
-@opindex mno-cirrus-fix-invalid-insns
-Insert NOPs into the instruction stream to in order to work around
-problems with invalid Maverick instruction combinations.  This option
-is only valid if the @option{-mcpu=ep9312} option has been used to
-enable generation of instructions for the Cirrus Maverick floating-point
-co-processor.  This option is not enabled by default, since the
-problem is only present in older Maverick implementations.  The default
-can be re-enabled by use of the @option{-mno-cirrus-fix-invalid-insns}
-switch.
-
 @item -mpoke-function-name
 @opindex mpoke-function-name
 Write the name of each function into the text section, directly
Index: config/arm/arm.opt
===================================================================
--- config/arm/arm.opt	(revision 193943)
+++ config/arm/arm.opt	(working copy)
@@ -101,10 +101,6 @@ mcaller-super-interworking
 Target Report Mask(CALLER_INTERWORKING)
 Thumb: Assume function pointers may go to non-Thumb aware code
 
-mcirrus-fix-invalid-insns
-Target Report Mask(CIRRUS_FIX_INVALID_INSNS)
-Cirrus: Place NOPs to avoid invalid instruction combinations
-
 mcpu=
 Target RejectNegative Joined Enum(processor_type) Var(arm_cpu_option) Init(arm_none)
 Specify the name of the target CPU