From patchwork Tue Dec 4 08:32:00 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Hesselbarth X-Patchwork-Id: 203579 X-Patchwork-Delegate: joe.hershberger@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id F25492C0092 for ; Tue, 4 Dec 2012 19:33:42 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 57BCF4A15C; Tue, 4 Dec 2012 09:33:27 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id flsQnlmhXhLQ; Tue, 4 Dec 2012 09:33:27 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 16A184A135; Tue, 4 Dec 2012 09:32:54 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E47DC4A107 for ; Tue, 4 Dec 2012 09:32:50 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id dPsx9wZtTS2g for ; Tue, 4 Dec 2012 09:32:50 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-bk0-f44.google.com (mail-bk0-f44.google.com [209.85.214.44]) by theia.denx.de (Postfix) with ESMTPS id 397B14A0AB for ; Tue, 4 Dec 2012 09:32:32 +0100 (CET) Received: by mail-bk0-f44.google.com with SMTP id w11so1485644bku.3 for ; Tue, 04 Dec 2012 00:32:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=BS6FFNgtjhcB1Kpm47f4c5L/ZxjBcT0Q9g/8AtGfCHs=; b=M/1t7GJeMutmns7N4d1999/yeoUYPneaRXqNS8Eyv/BGzNlTuiVRv3VC3FGEywMhtY OmMfOGSsaUkfRItTKEA2uR6Knb5UwAOFSTJH2IYPWODGLvYa1hvqGuc5XLUvILW3V0n+ 6wUSNQB+EBqJIma/y305hZ5zp1NTQpoqW9aImnWLWzwp0Et3qnB1mVrvSutT+1+CSC/T AHw5Vy8EObllkSOhyVpWMgUQmKk+VTMCsWB23TEchsed2hzrdLJkSbBTuCRsXsb+CZS2 76W69iTw13cKD0DFVJJ63aTywvpRFPDhoeaEIqYvh6ayMILEltNrWtHYMyUrVq30C93S Vt4Q== Received: by 10.204.145.219 with SMTP id e27mr3666023bkv.140.1354609952829; Tue, 04 Dec 2012 00:32:32 -0800 (PST) Received: from nijin.lan (dslc-082-083-245-055.pools.arcor-ip.net. [82.83.245.55]) by mx.google.com with ESMTPS id i20sm269279bkw.5.2012.12.04.00.32.29 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 04 Dec 2012 00:32:32 -0800 (PST) From: Sebastian Hesselbarth To: Sebastian Hesselbarth Date: Tue, 4 Dec 2012 09:32:00 +0100 Message-Id: <1354609923-27320-8-git-send-email-sebastian.hesselbarth@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1354609923-27320-1-git-send-email-sebastian.hesselbarth@gmail.com> References: <1354458982-14403-1-git-send-email-sebastian.hesselbarth@gmail.com> <1354609923-27320-1-git-send-email-sebastian.hesselbarth@gmail.com> Cc: Rabeeh Khoury , Luka Perkov , u-boot@lists.denx.de, Daniel Stodden , Andy Fleming Subject: [U-Boot] [PATCH v2 07/10] NET: mvgbe: add phylib support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This add phylib support to the Marvell GBE driver. Signed-off-by: Sebastian Hesselbarth --- Cc: u-boot@lists.denx.de Cc: Sebastian Hesselbarth Cc: Rabeeh Khoury Cc: Albert Aribaud Cc: Prafulla Wadaskar Cc: Andy Fleming Cc: Joe Hershberger Cc: Daniel Stodden Cc: Luka Perkov --- drivers/net/mvgbe.c | 68 ++++++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 64 insertions(+), 4 deletions(-) diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c index 47bf27c..192c989 100644 --- a/drivers/net/mvgbe.c +++ b/drivers/net/mvgbe.c @@ -52,7 +52,7 @@ DECLARE_GLOBAL_DATA_PTR; #define MV_PHY_ADR_REQUEST 0xee #define MVGBE_SMI_REG (((struct mvgbe_registers *)MVGBE0_BASE)->smi) -#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) +#if defined(CONFIG_PHYLIB) || defined(CONFIG_MII) || defined(CONFIG_CMD_MII) /* * smi_reg_read - miiphy_read callback function. * @@ -184,6 +184,24 @@ static int smi_reg_write(const char *devname, u8 phy_adr, u8 reg_ofs, u16 data) } #endif +#if defined(CONFIG_PHYLIB) +int mvgbe_phy_read(struct mii_dev *bus, int phyAddr, int devAddr, int regAddr) +{ + u16 data; + int ret; + ret = smi_reg_read(bus->name, phyAddr, regAddr, &data); + if (ret) + return ret; + return data; +} + +int mvgbe_phy_write(struct mii_dev *bus, int phyAddr, int devAddr, int regAddr, + u16 data) +{ + return smi_reg_write(bus->name, phyAddr, regAddr, data); +} +#endif + /* Stop and checks all queues */ static void stop_queue(u32 * qreg) { @@ -467,8 +485,9 @@ static int mvgbe_init(struct eth_device *dev) /* Enable port Rx. */ MVGBE_REG_WR(regs->rqc, (1 << RXUQ)); -#if (defined (CONFIG_MII) || defined (CONFIG_CMD_MII)) \ - && defined (CONFIG_SYS_FAULT_ECHO_LINK_DOWN) +#if (defined(CONFIG_MII) || defined(CONFIG_CMD_MII)) \ + && !defined(CONFIG_PHYLIB) \ + && defined(CONFIG_SYS_FAULT_ECHO_LINK_DOWN) /* Wait up to 5s for the link status */ for (i = 0; i < 5; i++) { u16 phyadr; @@ -647,6 +666,45 @@ static int mvgbe_recv(struct eth_device *dev) return 0; } +#if defined(CONFIG_PHYLIB) +int mvgbe_phylib_init(struct eth_device *dev, int phyid) +{ + struct mii_dev *bus; + struct phy_device *phydev; + int ret; + + bus = mdio_alloc(); + if (!bus) { + printf("mdio_alloc failed\n"); + return -ENOMEM; + } + bus->read = mvgbe_phy_read; + bus->write = mvgbe_phy_write; + sprintf(bus->name, dev->name); + + ret = mdio_register(bus); + if (ret) { + printf("mdio_register failed\n"); + free(bus); + return -ENOMEM; + } + + /* Set phy address of the port */ + mvgbe_phy_write(bus, MV_PHY_ADR_REQUEST, 0, MV_PHY_ADR_REQUEST, phyid); + + phydev = phy_connect(bus, phyid, dev, PHY_INTERFACE_MODE_RGMII); + if (!phydev) { + printf("phy_connect failed\n"); + return -ENODEV; + } + + phy_config(phydev); + phy_startup(phydev); + + return 0; +} +#endif + int mvgbe_initialize(bd_t *bis) { struct mvgbe_device *dmvgbe; @@ -729,7 +787,9 @@ error1: eth_register(dev); -#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) +#if defined(CONFIG_PHYLIB) + mvgbe_phylib_init(dev, PHY_BASE_ADR + devnum); +#elif defined(CONFIG_MII) || defined(CONFIG_CMD_MII) miiphy_register(dev->name, smi_reg_read, smi_reg_write); /* Set phy address of the port */ miiphy_write(dev->name, MV_PHY_ADR_REQUEST,