From patchwork Tue Dec 4 02:42:15 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 203544 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 36A042C008F for ; Tue, 4 Dec 2012 14:17:56 +1100 (EST) Received: from localhost ([::1]:34680 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TfiSF-00029D-Pd for incoming@patchwork.ozlabs.org; Mon, 03 Dec 2012 21:41:51 -0500 Received: from eggs.gnu.org ([208.118.235.92]:44492) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TfiRK-00005p-3D for qemu-devel@nongnu.org; Mon, 03 Dec 2012 21:41:34 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TfiR9-0002S7-0e for qemu-devel@nongnu.org; Mon, 03 Dec 2012 21:40:54 -0500 Received: from ozlabs.org ([203.10.76.45]:37535) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TfiR8-0002R5-9d; Mon, 03 Dec 2012 21:40:42 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 0FA312C00BE; Tue, 4 Dec 2012 13:40:38 +1100 (EST) From: David Gibson To: agraf@suse.de Date: Tue, 4 Dec 2012 13:42:15 +1100 Message-Id: <1354588937-27122-12-git-send-email-david@gibson.dropbear.id.au> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1354588937-27122-1-git-send-email-david@gibson.dropbear.id.au> References: <1354588937-27122-1-git-send-email-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 203.10.76.45 Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Subject: [Qemu-devel] [PATCH 11/13] pseries: Fixes and enhancements to L1 cache properties X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org PAPR requires that the device tree's CPU nodes have several properties with information about the L1 cache. We created two of these properties, but with incorrect names - "[id]cache-block-size" instead of "[id]-cache-block-size" (note the extra hyphen). We were also missing some of the required cache properties. This patch adds the [id]-cache-line-size properties (which have the same values as the block size properties in all current cases). We also add the [id]-cache-size properties. The latter requires some extra infrastructure in the general target-ppc code to (optionally) set the cache sizes for various CPUs. We obtain the published values either from there, or from the host when KVM is in use. Signed-off-by: David Gibson --- hw/spapr.c | 20 ++++++++++++++++++-- target-ppc/cpu.h | 1 + target-ppc/kvm.c | 10 ++++++++++ target-ppc/kvm_ppc.h | 12 ++++++++++++ target-ppc/translate_init.c | 4 ++++ 5 files changed, 45 insertions(+), 2 deletions(-) diff --git a/hw/spapr.c b/hw/spapr.c index d23aa9d..3bacf2f 100644 --- a/hw/spapr.c +++ b/hw/spapr.c @@ -315,6 +315,10 @@ static void *spapr_create_fdt_skel(const char *cpu_model, 0xffffffff, 0xffffffff}; uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ; uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000; + int dcache_size = kvm_enabled() ? kvmppc_get_dcache_size() + : env->l1_dcache_size; + int icache_size = kvm_enabled() ? kvmppc_get_icache_size() + : env->l1_icache_size; uint32_t page_sizes_prop[64]; size_t page_sizes_prop_size; @@ -335,10 +339,22 @@ static void *spapr_create_fdt_skel(const char *cpu_model, _FDT((fdt_property_string(fdt, "device_type", "cpu"))); _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR]))); - _FDT((fdt_property_cell(fdt, "dcache-block-size", + _FDT((fdt_property_cell(fdt, "d-cache-block-size", env->dcache_line_size))); - _FDT((fdt_property_cell(fdt, "icache-block-size", + _FDT((fdt_property_cell(fdt, "d-cache-line-size", + env->dcache_line_size))); + _FDT((fdt_property_cell(fdt, "i-cache-block-size", + env->icache_line_size))); + _FDT((fdt_property_cell(fdt, "i-cache-line-size", env->icache_line_size))); + + if (dcache_size) { + _FDT((fdt_property_cell(fdt, "d-cache-size", dcache_size))); + } + if (icache_size) { + _FDT((fdt_property_cell(fdt, "i-cache-size", icache_size))); + } + _FDT((fdt_property_cell(fdt, "timebase-frequency", tbfreq))); _FDT((fdt_property_cell(fdt, "clock-frequency", cpufreq))); _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr))); diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 742d4f8..7a42ce0 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1031,6 +1031,7 @@ struct CPUPPCState { int dcache_line_size; int icache_line_size; + int l1_dcache_size, l1_icache_size; /* Those resources are used during exception processing */ /* CPU model definition */ diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c index 3f5df57..b6f69e5 100644 --- a/target-ppc/kvm.c +++ b/target-ppc/kvm.c @@ -967,6 +967,16 @@ uint32_t kvmppc_get_dfp(void) return kvmppc_read_int_cpu_dt("ibm,dfp"); } +int kvmppc_get_icache_size(void) +{ + return kvmppc_read_int_cpu_dt("i-cache-size"); +} + +int kvmppc_get_dcache_size(void) +{ + return kvmppc_read_int_cpu_dt("d-cache-size"); +} + int kvmppc_get_hypercall(CPUPPCState *env, uint8_t *buf, int buf_len) { uint32_t *hc = (uint32_t*)buf; diff --git a/target-ppc/kvm_ppc.h b/target-ppc/kvm_ppc.h index baad6eb..17b8b23 100644 --- a/target-ppc/kvm_ppc.h +++ b/target-ppc/kvm_ppc.h @@ -19,6 +19,8 @@ uint32_t kvmppc_get_tbfreq(void); uint64_t kvmppc_get_clockfreq(void); uint32_t kvmppc_get_vmx(void); uint32_t kvmppc_get_dfp(void); +int kvmppc_get_icache_size(void); +int kvmppc_get_dcache_size(void); int kvmppc_get_hypercall(CPUPPCState *env, uint8_t *buf, int buf_len); int kvmppc_set_interrupt(CPUPPCState *env, int irq, int level); void kvmppc_set_papr(CPUPPCState *env); @@ -55,6 +57,16 @@ static inline uint32_t kvmppc_get_dfp(void) return 0; } +static inline int kvmppc_get_icache_size(void) +{ + return 0; +} + +static inline int kvmppc_get_dcache_size(void) +{ + return 0; +} + static inline int kvmppc_get_hypercall(CPUPPCState *env, uint8_t *buf, int buf_len) { return -1; diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index e63627c..dba572f 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -6753,6 +6753,10 @@ static void init_proc_POWER7 (CPUPPCState *env) init_excp_POWER7(env); env->dcache_line_size = 128; env->icache_line_size = 128; + + env->l1_dcache_size = 0x8000; + env->l1_icache_size = 0x8000; + /* Allocate hardware IRQ controller */ ppcPOWER7_irq_init(env); /* Can't find information on what this should be on reset. This