From patchwork Tue Dec 4 02:42:14 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 203536 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 2CBA12C00A7 for ; Tue, 4 Dec 2012 13:42:07 +1100 (EST) Received: from localhost ([::1]:34695 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TfiST-00029q-BA for incoming@patchwork.ozlabs.org; Mon, 03 Dec 2012 21:42:05 -0500 Received: from eggs.gnu.org ([208.118.235.92]:44511) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TfiRL-00005t-Rj for qemu-devel@nongnu.org; Mon, 03 Dec 2012 21:41:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TfiR8-0002Rq-KJ for qemu-devel@nongnu.org; Mon, 03 Dec 2012 21:40:55 -0500 Received: from ozlabs.org ([203.10.76.45]:34899) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TfiR8-0002R4-99; Mon, 03 Dec 2012 21:40:42 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 035FE2C00BD; Tue, 4 Dec 2012 13:40:37 +1100 (EST) From: David Gibson To: agraf@suse.de Date: Tue, 4 Dec 2012 13:42:14 +1100 Message-Id: <1354588937-27122-11-git-send-email-david@gibson.dropbear.id.au> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1354588937-27122-1-git-send-email-david@gibson.dropbear.id.au> References: <1354588937-27122-1-git-send-email-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 203.10.76.45 Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Subject: [Qemu-devel] [PATCH 10/13] target-ppc: Don't use hwaddr to represent hardware state X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The hwaddr type is somewhat vaguely defined as being able to contain bus addresses on the widest possible bus in the system. For that reason it's discouraged for representing specific pieces of persistent hardware state, which should instead use an explicit width type that matches the bits available in real hardware. In particular, because of the possibility that the size of hwaddr might change if different buses are added to the target in future, it's not suitable for use in vm state descriptions for savevm and migration. This patch purges such unwise uses of hwaddr from the ppc target code, which turns out to be just one. The ppcemb_tlb_t struct, used on a number of embedded ppc models to represent a TLB entry contains a hwaddr for the real address field. This patch changes it to be a fixed uint64_t which is suitable enough for all machine types which use this structure. Other uses of hwaddr in CPUPPCState turn out not to be problematic: htab_base and htab_mask are just used for the convenience of the TCG code; the underlying machine state is the SDR1 register, which is stored with a suitable type already. Likewise the mpic_cpu_base field is only used internally and does not represent fundamental hardware state which needs to be saved. Signed-off-by: David Gibson --- target-ppc/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 5f1dc8b..742d4f8 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -355,7 +355,7 @@ struct ppc6xx_tlb_t { typedef struct ppcemb_tlb_t ppcemb_tlb_t; struct ppcemb_tlb_t { - hwaddr RPN; + uint64_t RPN; target_ulong EPN; target_ulong PID; target_ulong size;