[U-Boot,v2,2/3] x86: Enable ICH6 GPIO controller for coreboot

Submitted by Simon Glass on Dec. 2, 2012, 1:44 p.m.

Details

Message ID 1354455885-9061-2-git-send-email-sjg@chromium.org
State Accepted, archived
Delegated to: Simon Glass
Headers show

Commit Message

Simon Glass Dec. 2, 2012, 1:44 p.m.
Coreboot uses this controller to implement GPIO access.

Signed-off-by: Simon Glass <sjg@chromium.org>
---
Changes in v2:
- Enable gpio command for coreboot also

 include/configs/coreboot.h |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

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diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
index a010adc..fcfa7ed 100644
--- a/include/configs/coreboot.h
+++ b/include/configs/coreboot.h
@@ -138,6 +138,9 @@ 
 #undef CONFIG_VIDEO
 #undef CONFIG_CFB_CONSOLE
 
+/* x86 GPIOs are accessed through a PCI device */
+#define CONFIG_INTEL_ICH6_GPIO
+
 /*-----------------------------------------------------------------------
  * Command line configuration.
  */
@@ -150,6 +153,7 @@ 
 #define CONFIG_CMD_ECHO
 #undef CONFIG_CMD_FLASH
 #define CONFIG_CMD_FPGA
+#define CONFIG_CMD_GPIO
 #define CONFIG_CMD_IMI
 #undef CONFIG_CMD_IMLS
 #define CONFIG_CMD_IRQ