From patchwork Sun Dec 2 02:57:20 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [RFT,3/5] usb/ehci: Add SysBus EHCI device for Exynos4210 From: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 203180 Message-Id: <1354417042-8818-4-git-send-email-andreas.faerber@web.de> To: qemu-devel@nongnu.org Cc: Igor Mitsyanko , peter.crosthwaite@xilinx.com, walimisdev@gmail.com, kraxel@redhat.com, =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Sun, 2 Dec 2012 03:57:20 +0100 It uses a different capsbase and opregbase than the Xilinx device. Signed-off-by: Liming Wang Signed-off-by: Andreas Färber Cc: Igor Mitsyanko Reviewed-by: Igor Mitsyanko --- hw/usb/hcd-ehci-sysbus.c | 15 +++++++++++++++ hw/usb/hcd-ehci.h | 2 ++ 2 Dateien geändert, 17 Zeilen hinzugefügt(+) diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci-sysbus.c index 38e82bb..2ac61e6 100644 --- a/hw/usb/hcd-ehci-sysbus.c +++ b/hw/usb/hcd-ehci-sysbus.c @@ -103,10 +103,25 @@ static const TypeInfo ehci_xlnx_type_info = { .class_init = ehci_xlnx_class_init, }; +static void ehci_exynos4210_class_init(ObjectClass *oc, void *data) +{ + SysBusEHCIClass *sec = SYS_BUS_EHCI_CLASS(oc); + + sec->capsbase = 0x0; + sec->opregbase = 0x40; +} + +static const TypeInfo ehci_exynos4210_type_info = { + .name = TYPE_EXYNOS4210_EHCI, + .parent = TYPE_SYS_BUS_EHCI, + .class_init = ehci_exynos4210_class_init, +}; + static void ehci_sysbus_register_types(void) { type_register_static(&ehci_type_info); type_register_static(&ehci_xlnx_type_info); + type_register_static(&ehci_exynos4210_type_info); } type_init(ehci_sysbus_register_types) diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h index d8078f4..b8b6461 100644 --- a/hw/usb/hcd-ehci.h +++ b/hw/usb/hcd-ehci.h @@ -314,6 +314,8 @@ struct EHCIState { bool int_req_by_async; }; +#define TYPE_EXYNOS4210_EHCI "exynos4210-usb" + extern const VMStateDescription vmstate_ehci; void usb_ehci_initfn(EHCIState *s, DeviceState *dev);