Patchwork [U-Boot,v3,3/3] apf27: add FPGA support for the apf27 board

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Submitter trem
Date Dec. 1, 2012, 10:44 a.m.
Message ID <1354358693-28737-4-git-send-email-tremyfr@yahoo.fr>
Download mbox | patch
Permalink /patch/203118/
State Changes Requested
Delegated to: Stefano Babic
Headers show

Comments

trem - Dec. 1, 2012, 10:44 a.m.
Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
Signed-off-by: Eric Jarrige <eric.jarrige@armadeus.org>
---
 board/armadeus/apf27/Makefile |    3 +
 board/armadeus/apf27/apf27.c  |   16 +++
 board/armadeus/apf27/fpga.c   |  262 +++++++++++++++++++++++++++++++++++++++++
 board/armadeus/apf27/fpga.h   |   39 ++++++
 4 files changed, 320 insertions(+), 0 deletions(-)
 create mode 100644 board/armadeus/apf27/fpga.c
 create mode 100644 board/armadeus/apf27/fpga.h

Patch

diff --git a/board/armadeus/apf27/Makefile b/board/armadeus/apf27/Makefile
index f57f405..9d356a3 100644
--- a/board/armadeus/apf27/Makefile
+++ b/board/armadeus/apf27/Makefile
@@ -29,6 +29,9 @@  LIB	= $(obj)lib$(BOARD).o
 
 ifndef	CONFIG_SPL_BUILD
 COBJS	:= apf27.o
+ifdef CONFIG_FPGA
+COBJS	+= fpga.o
+endif
 endif
 
 SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c
index cbd09a7..e375a76 100644
--- a/board/armadeus/apf27/apf27.c
+++ b/board/armadeus/apf27/apf27.c
@@ -30,6 +30,7 @@ 
 #include <asm/errno.h>
 #include "apf27.h"
 #include "crc.h"
+#include "fpga.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -310,6 +311,21 @@  misc_init_r(void)
 	struct mtd_device *dev;
 	struct part_info *part;
 
+#if defined(CONFIG_FPGA)
+	/* init and download fpga */
+	if ((autoload) && (0 == strcmp(autoload, "1"))) {
+		if (mtdparts_init() == 0)
+			if (find_dev_and_part("firmware",
+					      &dev, &pnum, &part) == 0) {
+				size = part->size;
+				if (nand_read_skip_bad(&nand_info[0],
+					part->offset, &size, firmware_buffer))
+					size = 0;
+			}
+	}
+	APF27_init_fpga(firmware_buffer, size);
+#endif
+
 	/* detect compatibility issue of environment version */
 	s = getenv("env_version");
 	if ((NULL == s) || (0 != strcmp(s, CONFIG_ENV_VERSION))) {
diff --git a/board/armadeus/apf27/fpga.c b/board/armadeus/apf27/fpga.c
new file mode 100644
index 0000000..d5c27a7
--- /dev/null
+++ b/board/armadeus/apf27/fpga.c
@@ -0,0 +1,262 @@ 
+/*
+ * (C) Copyright 2002-2012
+ * Eric Jarrige <eric.jarrige@armadeus.org>
+ * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
+ * Keith Outwater, keith_outwater@mvis.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include <common.h>
+
+#include <asm/arch/imx-regs.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <command.h>
+#include <config.h>
+#include "fpga.h"
+#include <spartan3.h>
+#include "apf27.h"
+
+/*
+ * Note that these are pointers to code that is in Flash.  They will be
+ * relocated at runtime.
+ * Spartan2 code is used to download our Spartan 3 :) code is compatible.
+ * Just take care about the file size
+ */
+Xilinx_Spartan3_Slave_Parallel_fns fpga_fns = {
+	fpga_pre_fn,
+	fpga_pgm_fn,
+	fpga_init_fn,
+	NULL,
+	fpga_done_fn,
+	fpga_clk_fn,
+	fpga_cs_fn,
+	fpga_wr_fn,
+	fpga_rdata_fn,
+	fpga_wdata_fn,
+	fpga_busy_fn,
+	fpga_abort_fn,
+	fpga_post_fn,
+};
+
+Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
+	{Xilinx_Spartan3,
+	 slave_parallel,
+	 1196128l/8,
+	 (void *) &fpga_fns,
+	 0}
+};
+
+/*
+ * Initialize GPIO port B before download
+ */
+int
+fpga_pre_fn(int cookie)
+{
+	/* Initialize GPIO pins */
+	gpio_set_value(ACFG_FPGA_PWR, 1);
+	imx_gpio_mode(ACFG_FPGA_INIT | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
+	imx_gpio_mode(ACFG_FPGA_DONE | GPIO_IN | GPIO_PUEN | GPIO_GPIO);
+	imx_gpio_mode(ACFG_FPGA_PRG | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+	imx_gpio_mode(ACFG_FPGA_CLK | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+	imx_gpio_mode(ACFG_FPGA_RW | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+	imx_gpio_mode(ACFG_FPGA_CS | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+	imx_gpio_mode(ACFG_FPGA_SUSPEND|GPIO_OUT|GPIO_PUEN|GPIO_GPIO);
+	gpio_set_value(ACFG_FPGA_RESET, 1);
+	imx_gpio_mode(ACFG_FPGA_RESET | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+	imx_gpio_mode(ACFG_FPGA_PWR | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+	gpio_set_value(ACFG_FPGA_PRG, 1);
+	gpio_set_value(ACFG_FPGA_CLK, 1);
+	gpio_set_value(ACFG_FPGA_RW, 1);
+	gpio_set_value(ACFG_FPGA_CS, 1);
+	gpio_set_value(ACFG_FPGA_SUSPEND, 0);
+	gpio_set_value(ACFG_FPGA_PWR, 0);
+
+	return cookie;
+}
+
+/*
+ * Set the FPGA's active-low program line to the specified level
+ */
+int
+fpga_pgm_fn(int assert, int flush, int cookie)
+{
+	debug("%s:%d: FPGA PROGRAM %s", __func__, __LINE__,
+					assert ? "high" : "low");
+	gpio_set_value(ACFG_FPGA_PRG, !assert);
+	return assert;
+}
+
+/*
+ * Set the FPGA's active-high clock line to the specified level
+ */
+int
+fpga_clk_fn(int assert_clk, int flush, int cookie)
+{
+	debug("%s:%d: FPGA CLOCK %s", __func__, __LINE__,
+					assert_clk ? "high" : "low");
+	gpio_set_value(ACFG_FPGA_CLK, !assert_clk);
+	return assert_clk;
+}
+
+/*
+ * Test the state of the active-low FPGA INIT line.  Return 1 on INIT
+ * asserted (low).
+ */
+int
+fpga_init_fn(int cookie)
+{
+	int value;
+	debug("%s:%d: INIT check... ", __func__, __LINE__);
+	value = gpio_get_value(ACFG_FPGA_INIT);
+	/* printf("init value read %x",value); */
+#ifdef CONFIG_SYS_FPGA_IS_PROTO
+	return value;
+#else
+	return !value;
+#endif
+}
+
+/*
+ * Test the state of the active-high FPGA DONE pin
+ */
+int
+fpga_done_fn(int cookie)
+{
+	debug("%s:%d: DONE check... %s", __func__, __LINE__,
+			gpio_get_value(ACFG_FPGA_DONE) ? "high" : "low");
+	return gpio_get_value(ACFG_FPGA_DONE) ? FPGA_SUCCESS : FPGA_FAIL;
+}
+
+/*
+ * Set the FPGA's wr line to the specified level
+ */
+int
+fpga_wr_fn(int assert_write, int flush, int cookie)
+{
+	debug("%s:%d: FPGA RW... %s ", __func__, __LINE__,
+					assert_write ? "high" : "low");
+	gpio_set_value(ACFG_FPGA_RW, !assert_write);
+	return assert_write;
+}
+
+int
+fpga_cs_fn(int assert_cs, int flush, int cookie)
+{
+	debug("%s:%d: FPGA CS %s ", __func__, __LINE__,
+					assert_cs ? "high" : "low");
+	gpio_set_value(ACFG_FPGA_CS, !assert_cs);
+	return assert_cs;
+}
+
+int
+fpga_rdata_fn(unsigned char *data, int cookie)
+{
+	debug("%s:%d: FPGA READ DATA %02X ", __func__, __LINE__,
+					*((char *)ACFG_FPGA_RDATA));
+	*data = (unsigned char) \
+		((*((unsigned short *)ACFG_FPGA_RDATA))&0x00FF);
+	return *data;
+}
+
+int
+fpga_wdata_fn(unsigned char data, int cookie)
+{
+	debug("%s:%d: FPGA WRITE DATA %02X ", __func__, __LINE__,
+					data);
+	*((unsigned short *)ACFG_FPGA_WDATA) = data;
+	return data;
+}
+
+int
+fpga_abort_fn(int cookie)
+{
+	return cookie;
+}
+
+
+int
+fpga_busy_fn(int cookie)
+{
+	return 1;
+}
+
+int
+fpga_post_fn(int cookie)
+{
+	debug("%s:%d: FPGA POST ", __func__, __LINE__);
+
+	imx_gpio_mode(ACFG_FPGA_RW | GPIO_PF | GPIO_PUEN);
+	imx_gpio_mode(ACFG_FPGA_CS | GPIO_PF | GPIO_PUEN);
+	imx_gpio_mode(ACFG_FPGA_CLK | GPIO_PF | GPIO_PUEN);
+	gpio_set_value(ACFG_FPGA_PRG, 1);
+	gpio_set_value(ACFG_FPGA_RESET, 0);
+	imx_gpio_mode(ACFG_FPGA_RESET | GPIO_OUT | GPIO_PUEN | GPIO_GPIO);
+	return cookie;
+}
+
+void apf27_fpga_setup(void)
+{
+	struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
+	struct system_control_regs *system = \
+		(struct system_control_regs *)IMX_SYSTEM_CTL_BASE;
+
+	/* Configure FPGA CLKO */
+	writel(ACFG_CCSR_VAL, &pll->ccsr);
+
+	/* Configure strentgh for FPGA */
+	writel(ACFG_DSCR10_VAL, &system->dscr10);
+	writel(ACFG_DSCR3_VAL, &system->dscr3);
+	writel(ACFG_DSCR7_VAL, &system->dscr7);
+	writel(ACFG_DSCR2_VAL, &system->dscr2);
+}
+
+/*
+ * Initialize the fpga.  Return 1 on success, 0 on failure.
+ */
+int
+APF27_init_fpga(u_char *buffer, size_t size)
+{
+	char *autoload = getenv("firmware_autoload");
+
+	int i, lout = 0;
+
+	apf27_fpga_setup();
+
+	fpga_init();
+
+	for (i = 0; i < CONFIG_FPGA_COUNT; i++) {
+		debug("%s:%d: Adding fpga %d\n", __func__, __LINE__, i);
+		fpga_add(fpga_xilinx, &fpga[i]);
+	}
+
+	if ((size >= fpga[0].size) && (autoload) &&
+		(0 == strcmp(autoload, "1"))) {
+		if (ctrlc()) {
+			printf("Firmware download stopped!\n");
+		} else if (FPGA_SUCCESS != fpga_load(0, (void *)buffer, size)) {
+			printf("Firmware download failed!\n");
+		} else {
+			printf("Firmware successfully programmed\n");
+			lout = 1;
+		}
+	}
+	return lout;
+}
diff --git a/board/armadeus/apf27/fpga.h b/board/armadeus/apf27/fpga.h
new file mode 100644
index 0000000..b11b24c
--- /dev/null
+++ b/board/armadeus/apf27/fpga.h
@@ -0,0 +1,39 @@ 
+/*
+ * (C) Copyright 2002-2012
+ * Eric Jarrige <eric.jarrige@armadeus.org>
+ * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
+ * Keith Outwater, keith_outwater@mvis.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+extern int APF27_init_fpga(u_char *buffer, size_t size);
+
+extern int fpga_pre_fn(int cookie);
+extern int fpga_pgm_fn(int assert_pgm, int flush, int cookie);
+extern int fpga_cs_fn(int assert_cs, int flush, int cookie);
+extern int fpga_init_fn(int cookie);
+extern int fpga_done_fn(int cookie);
+extern int fpga_clk_fn(int assert_clk, int flush, int cookie);
+extern int fpga_wr_fn(int assert_write, int flush, int cookie);
+extern int fpga_rdata_fn(unsigned char *data, int cookie);
+extern int fpga_wdata_fn(unsigned char data, int cookie);
+extern int fpga_abort_fn(int cookie);
+extern int fpga_post_fn(int cookie);
+extern int fpga_busy_fn(int cookie);