From patchwork Tue Nov 27 16:55:27 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Dietrich X-Patchwork-Id: 202265 X-Patchwork-Delegate: twarren@nvidia.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id A03332C0082 for ; Wed, 28 Nov 2012 03:56:12 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 517AD4A0BE; Tue, 27 Nov 2012 17:56:11 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id onqnS+Z-Nwdi; Tue, 27 Nov 2012 17:56:11 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3F3634A0C3; Tue, 27 Nov 2012 17:56:00 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 357434A0B8 for ; Tue, 27 Nov 2012 17:55:55 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 10tyOGBZW5Y8 for ; Tue, 27 Nov 2012 17:55:54 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mailout-de.gmx.net (mailout-de.gmx.net [213.165.64.22]) by theia.denx.de (Postfix) with SMTP id 616084A0B7 for ; Tue, 27 Nov 2012 17:55:52 +0100 (CET) Received: (qmail invoked by alias); 27 Nov 2012 16:55:51 -0000 Received: from pD9E5C8E2.dip0.t-ipconnect.de (EHLO ax5200p.fritz.box) [217.229.200.226] by mail.gmx.net (mp069) with SMTP; 27 Nov 2012 17:55:51 +0100 X-Authenticated: #9962044 X-Provags-ID: V01U2FsdGVkX19cbSEioiZckYyNhINeaohsk73qTontpToTFde6CJ W4uDEyWz3/Ee9Y From: Marc Dietrich To: Tom Warren Date: Tue, 27 Nov 2012 17:55:27 +0100 Message-Id: <325fe05ffdb402a6d147a712d8a2d370caf2c413.1354034823.git.marvin24@gmx.de> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <989998c93aee2057bf3ade9532201f798b84049e.1354034822.git.marvin24@gmx.de> References: <989998c93aee2057bf3ade9532201f798b84049e.1354034822.git.marvin24@gmx.de> In-Reply-To: <989998c93aee2057bf3ade9532201f798b84049e.1354034822.git.marvin24@gmx.de> References: <989998c93aee2057bf3ade9532201f798b84049e.1354034822.git.marvin24@gmx.de> X-Y-GMX-Trusted: 0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 2/2 v2] tegra: enable LCD on PAZ00 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This adds LCD panel descriptions to the device tree of PAZ00 and enables LCD support in the configuration. Signed-off-by: Marc Dietrich --- I'll create a patch to add LCD support to common TEGRA_DEVICE_SETTINGS once the tegra tree is rebased. changes in V2: - s/DISPALY/DISPLAY/ - removed W0 gpio which is not used - set all panel-timings to 0 board/compal/dts/tegra20-paz00.dts | 31 +++++++++++++++++++++++++++++++ board/compal/paz00/paz00.c | 11 +++++++++++ include/configs/paz00.h | 15 +++++++++++++++ 3 files changed, 57 insertions(+) diff --git a/board/compal/dts/tegra20-paz00.dts b/board/compal/dts/tegra20-paz00.dts index 9e3e169..8c258ff 100644 --- a/board/compal/dts/tegra20-paz00.dts +++ b/board/compal/dts/tegra20-paz00.dts @@ -54,4 +54,35 @@ usb@c5004000 { status = "disabled"; }; + + host1x { + status = "okay"; + dc@54200000 { + status = "okay"; + rgb { + status = "okay"; + nvidia,panel = <&lcd_panel>; + }; + }; + }; + + lcd_panel: panel { + /* PAZ00 has 1024x600 */ + clock = <54030000>; + xres = <1024>; + yres = <600>; + right-margin = <160>; + left-margin = <24>; + hsync-len = <136>; + upper-margin = <3>; + lower-margin = <61>; + vsync-len = <6>; + hsync-active-high; + nvidia,bits-per-pixel = <16>; + nvidia,pwm = <&pwm 0 0>; + nvidia,backlight-enable-gpios = <&gpio 164 0>; /* PU4 */ + nvidia,lvds-shutdown-gpios = <&gpio 102 0>; /* PM6 */ + nvidia,panel-vdd-gpios = <&gpio 4 0>; /* PA4 */ + nvidia,panel-timings = <0 0 0 0>; + }; }; diff --git a/board/compal/paz00/paz00.c b/board/compal/paz00/paz00.c index 6492d41..1447f47 100644 --- a/board/compal/paz00/paz00.c +++ b/board/compal/paz00/paz00.c @@ -71,3 +71,14 @@ int board_mmc_init(bd_t *bd) return 0; } #endif + +#ifdef CONFIG_LCD +/* this is a weak define that we are overriding */ +void pin_mux_display(void) +{ + debug("init display pinmux\n"); + + /* EN_VDD_PANEL GPIO A4 */ + pinmux_tristate_disable(PINGRP_DAP2); +} +#endif diff --git a/include/configs/paz00.h b/include/configs/paz00.h index 38c79cf..4a74d00 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -36,6 +36,7 @@ #define CONFIG_MACH_TYPE MACH_TYPE_PAZ00 #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT /* SD/MMC */ #define CONFIG_MMC @@ -71,6 +72,20 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP +#undef TEGRA_DEVICE_SETTINGS +#define TEGRA_DEVICE_SETTINGS \ + "stdin=serial\0" \ + "stdout=serial,lcd\0" \ + "stderr=serial,lcd\0" + +/* LCD support */ +#define CONFIG_LCD +#define CONFIG_PWM_TEGRA +#define CONFIG_VIDEO_TEGRA +#define LCD_BPP LCD_COLOR16 +#define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_CONSOLE_SCROLL_LINES 10 + #include "tegra-common-post.h" #endif /* __CONFIG_H */