From patchwork Tue Nov 27 08:59:13 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerd Hoffmann X-Patchwork-Id: 202169 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id D0BC82C0084 for ; Tue, 27 Nov 2012 21:12:16 +1100 (EST) Received: from localhost ([::1]:54626 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TdH1p-0007OR-Cw for incoming@patchwork.ozlabs.org; Tue, 27 Nov 2012 04:00:29 -0500 Received: from eggs.gnu.org ([208.118.235.92]:35954) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TdH11-0005kz-OK for qemu-devel@nongnu.org; Tue, 27 Nov 2012 03:59:45 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TdH0u-0004zE-OO for qemu-devel@nongnu.org; Tue, 27 Nov 2012 03:59:39 -0500 Received: from mx1.redhat.com ([209.132.183.28]:57269) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TdH0u-0004yh-GE for qemu-devel@nongnu.org; Tue, 27 Nov 2012 03:59:32 -0500 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id qAR8xUXX021325 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Tue, 27 Nov 2012 03:59:31 -0500 Received: from rincewind.home.kraxel.org (ovpn-116-25.ams2.redhat.com [10.36.116.25]) by int-mx11.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id qAR8xTb5027675; Tue, 27 Nov 2012 03:59:30 -0500 Received: by rincewind.home.kraxel.org (Postfix, from userid 500) id EE9ED408C4; Tue, 27 Nov 2012 09:59:28 +0100 (CET) From: Gerd Hoffmann To: qemu-devel@nongnu.org Date: Tue, 27 Nov 2012 09:59:13 +0100 Message-Id: <1354006768-13128-4-git-send-email-kraxel@redhat.com> In-Reply-To: <1354006768-13128-1-git-send-email-kraxel@redhat.com> References: <1354006768-13128-1-git-send-email-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.24 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: afaerber@suse.de, Gerd Hoffmann Subject: [Qemu-devel] [PATCH v2 03/18] apci: switch vt82c686 to memory api X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Gerd Hoffmann --- hw/vt82c686.c | 37 +++++++++++++++++++++++++++---------- 1 files changed, 27 insertions(+), 10 deletions(-) diff --git a/hw/vt82c686.c b/hw/vt82c686.c index 5d7c00c..3fc6063 100644 --- a/hw/vt82c686.c +++ b/hw/vt82c686.c @@ -24,6 +24,7 @@ #include "pm_smbus.h" #include "sysemu.h" #include "qemu-timer.h" +#include "exec-memory.h" typedef uint32_t pci_addr_t; #include "pci_host.h" @@ -159,6 +160,7 @@ static void vt82c686b_write_config(PCIDevice * d, uint32_t address, typedef struct VT686PMState { PCIDevice dev; + MemoryRegion io; ACPIREGS ar; APMState apm; PMSMBus smb; @@ -266,21 +268,32 @@ static uint32_t pm_ioport_readl(void *opaque, uint32_t addr) return val; } +static const MemoryRegionOps pm_io_ops = { + .old_portio = (MemoryRegionPortio[]) { + { .offset = 0, .len = 64, .size = 2, + .read = pm_ioport_readw, .write = pm_ioport_writew }, + { .offset = 0, .len = 64, .size = 4, + .read = pm_ioport_readl, .write = pm_ioport_writel }, + PORTIO_END_OF_LIST(), + }, + .valid.min_access_size = 1, + .valid.max_access_size = 4, + .impl.min_access_size = 1, + .impl.max_access_size = 4, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + static void pm_io_space_update(VT686PMState *s) { uint32_t pm_io_base; - if (s->dev.config[0x80] & 1) { - pm_io_base = pci_get_long(s->dev.config + 0x40); - pm_io_base &= 0xffc0; + pm_io_base = pci_get_long(s->dev.config + 0x40); + pm_io_base &= 0xffc0; - /* XXX: need to improve memory and ioport allocation */ - DPRINTF("PM: mapping to 0x%x\n", pm_io_base); - register_ioport_write(pm_io_base, 64, 2, pm_ioport_writew, s); - register_ioport_read(pm_io_base, 64, 2, pm_ioport_readw, s); - register_ioport_write(pm_io_base, 64, 4, pm_ioport_writel, s); - register_ioport_read(pm_io_base, 64, 4, pm_ioport_readl, s); - } + memory_region_transaction_begin(); + memory_region_set_enabled(&s->io, s->dev.config[0x80] & 1); + memory_region_set_address(&s->io, pm_io_base); + memory_region_transaction_commit(); } static void pm_write_config(PCIDevice *d, @@ -429,6 +442,10 @@ static int vt82c686b_pm_initfn(PCIDevice *dev) apm_init(&s->apm, NULL, s); + memory_region_init_io(&s->io, &pm_io_ops, s, "vt82c686-pm", 64); + memory_region_set_enabled(&s->io, false); + memory_region_add_subregion(get_system_io(), 0, &s->io); + acpi_pm_tmr_init(&s->ar, pm_tmr_timer); acpi_pm1_cnt_init(&s->ar);