Patchwork [v7,07/10] i8254/i8259: workaround to make IRQ0 work like before

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Submitter Matthew Ogilvie
Date Nov. 25, 2012, 9:51 p.m.
Message ID <1353880306-8004-8-git-send-email-mmogilvi_qemu@miniinfo.net>
Download mbox | patch
Permalink /patch/201572/
State New
Headers show

Comments

Matthew Ogilvie - Nov. 25, 2012, 9:51 p.m.
Someday it should be fixed properly, but doing so may
break migration.  So go with an incremental approach instead.

Signed-off-by: Matthew Ogilvie <mmogilvi_qemu@miniinfo.net>
---
 hw/i8259.c | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

Patch

diff --git a/hw/i8259.c b/hw/i8259.c
index 9b2ec40..71cc09a 100644
--- a/hw/i8259.c
+++ b/hw/i8259.c
@@ -150,8 +150,25 @@  static void pic_set_irq(void *opaque, int irq, int level)
         /* Dropping level clears the interrupt regardless of edge trigger
          * vs level trigger.
          */
-        s->irr &= ~mask;
         s->last_irr &= ~mask;
+
+        /* Migration compatibility hack:
+         *
+         * The i8254 timer model is wrong in a number of ways,
+         * including lowering IRQ0 much earlier than it should.
+         *
+         * FIXME i8254_timing_fixes: Eventually the i8254
+         *  should be fixed, but it isn't
+         *  trivial to do so in a way that avoids possible problems with
+         *  migration (lost or gained timer ticks).  So for now, make the
+         *  i8254 work the same way that it worked in qemu 1.2, and
+         *  leave irr for IRQ0 alone in the i8259 here:
+         */
+        if (irq == 0 && s->master) {
+            mask = 0;
+        }
+
+        s->irr &= ~mask;
     }
     pic_update_irq(s);
 }