From patchwork Fri Nov 23 15:48:19 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerd Hoffmann X-Patchwork-Id: 201376 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 9D9432C007E for ; Sat, 24 Nov 2012 03:45:29 +1100 (EST) Received: from localhost ([::1]:49727 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TbvVU-0008Cc-IJ for incoming@patchwork.ozlabs.org; Fri, 23 Nov 2012 10:49:32 -0500 Received: from eggs.gnu.org ([208.118.235.92]:35039) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TbvUj-00068W-D1 for qemu-devel@nongnu.org; Fri, 23 Nov 2012 10:48:50 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TbvUZ-0006jC-OY for qemu-devel@nongnu.org; Fri, 23 Nov 2012 10:48:45 -0500 Received: from mx1.redhat.com ([209.132.183.28]:55565) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TbvUZ-0006ia-Ge for qemu-devel@nongnu.org; Fri, 23 Nov 2012 10:48:35 -0500 Received: from int-mx01.intmail.prod.int.phx2.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id qANFmYRq024721 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Fri, 23 Nov 2012 10:48:34 -0500 Received: from rincewind.home.kraxel.org (ovpn-116-26.ams2.redhat.com [10.36.116.26]) by int-mx01.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id qANFmXFq013526; Fri, 23 Nov 2012 10:48:33 -0500 Received: by rincewind.home.kraxel.org (Postfix, from userid 500) id E57724058B; Fri, 23 Nov 2012 16:48:31 +0100 (CET) From: Gerd Hoffmann To: qemu-devel@nongnu.org Date: Fri, 23 Nov 2012 16:48:19 +0100 Message-Id: <1353685711-24573-9-git-send-email-kraxel@redhat.com> In-Reply-To: <1353685711-24573-1-git-send-email-kraxel@redhat.com> References: <1353685711-24573-1-git-send-email-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.67 on 10.5.11.11 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: Gerd Hoffmann Subject: [Qemu-devel] [PATCH 08/20] apci: switch evt to memory api X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Gerd Hoffmann --- hw/acpi.c | 49 +++++++++++++++++++++++++++++++++++++++++++++++-- hw/acpi.h | 6 ++++-- hw/acpi_piix4.c | 18 +----------------- hw/vt82c686.c | 18 +----------------- 4 files changed, 53 insertions(+), 38 deletions(-) diff --git a/hw/acpi.c b/hw/acpi.c index 956db95..e58e45f 100644 --- a/hw/acpi.c +++ b/hw/acpi.c @@ -275,7 +275,7 @@ uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar) return ar->pm1.evt.sts; } -void acpi_pm1_evt_write_sts(ACPIREGS *ar, uint16_t val) +static void acpi_pm1_evt_write_sts(ACPIREGS *ar, uint16_t val) { uint16_t pm1_sts = acpi_pm1_evt_get_sts(ar); if (pm1_sts & val & ACPI_BITMASK_TIMER_STATUS) { @@ -285,7 +285,7 @@ void acpi_pm1_evt_write_sts(ACPIREGS *ar, uint16_t val) ar->pm1.evt.sts &= ~val; } -void acpi_pm1_evt_write_en(ACPIREGS *ar, uint16_t val) +static void acpi_pm1_evt_write_en(ACPIREGS *ar, uint16_t val) { ar->pm1.evt.en = val; qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_RTC, @@ -310,6 +310,51 @@ void acpi_pm1_evt_reset(ACPIREGS *ar) qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_PMTIMER, 0); } +static uint64_t acpi_pm_evt_read(void *opaque, hwaddr addr, unsigned width) +{ + ACPIREGS *ar = opaque; + switch (addr) { + case 0: + return acpi_pm1_evt_get_sts(ar); + case 2: + return ar->pm1.evt.en; + default: + return 0; + } +} + +static void acpi_pm_evt_write(void *opaque, hwaddr addr, uint64_t val, + unsigned width) +{ + ACPIREGS *ar = opaque; + switch (addr) { + case 0: + acpi_pm1_evt_write_sts(ar, val); + ar->pm1.evt.update_sci(ar); + break; + case 2: + acpi_pm1_evt_write_en(ar, val); + ar->pm1.evt.update_sci(ar); + break; + } +} + +static const MemoryRegionOps acpi_pm_evt_ops = { + .read = acpi_pm_evt_read, + .write = acpi_pm_evt_write, + .valid.min_access_size = 2, + .valid.max_access_size = 2, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + +void acpi_pm1_evt_init(ACPIREGS *ar, acpi_update_sci_fn update_sci, + MemoryRegion *parent) +{ + ar->pm1.evt.update_sci = update_sci; + memory_region_init_io(&ar->pm1.evt.io, &acpi_pm_evt_ops, ar, "acpi-evt", 4); + memory_region_add_subregion(parent, 0, &ar->pm1.evt.io); +} + /* ACPI PM_TMR */ void acpi_pm_tmr_update(ACPIREGS *ar, bool enable) { diff --git a/hw/acpi.h b/hw/acpi.h index 97aaab8..918d7f5 100644 --- a/hw/acpi.h +++ b/hw/acpi.h @@ -91,8 +91,10 @@ struct ACPIPMTimer { }; struct ACPIPM1EVT { + MemoryRegion io; uint16_t sts; uint16_t en; + acpi_update_sci_fn update_sci; }; struct ACPIPM1CNT { @@ -135,10 +137,10 @@ static inline int64_t acpi_pm_tmr_get_clock(void) /* PM1a_EVT: piix and ich9 don't implement PM1b. */ uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar); -void acpi_pm1_evt_write_sts(ACPIREGS *ar, uint16_t val); -void acpi_pm1_evt_write_en(ACPIREGS *ar, uint16_t val); void acpi_pm1_evt_power_down(ACPIREGS *ar); void acpi_pm1_evt_reset(ACPIREGS *ar); +void acpi_pm1_evt_init(ACPIREGS *ar, acpi_update_sci_fn update_sci, + MemoryRegion *parent); /* PM1a_CNT: piix and ich9 don't implement PM1b CNT. */ void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent); diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index c68a0e7..e4fe6f1 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -113,22 +113,12 @@ static void pm_tmr_timer(ACPIREGS *ar) static void pm_ioport_write(void *opaque, hwaddr addr, uint64_t val, unsigned width) { - PIIX4PMState *s = opaque; - if (width != 2) { PIIX4_DPRINTF("PM write port=0x%04x width=%d val=0x%08x\n", (unsigned)addr, width, (unsigned)val); } switch(addr) { - case 0x00: - acpi_pm1_evt_write_sts(&s->ar, val); - pm_update_sci(s); - break; - case 0x02: - acpi_pm1_evt_write_en(&s->ar, val); - pm_update_sci(s); - break; default: break; } @@ -138,16 +128,9 @@ static void pm_ioport_write(void *opaque, hwaddr addr, uint64_t val, static uint64_t pm_ioport_read(void *opaque, hwaddr addr, unsigned width) { - PIIX4PMState *s = opaque; uint32_t val; switch(addr) { - case 0x00: - val = acpi_pm1_evt_get_sts(&s->ar); - break; - case 0x02: - val = s->ar.pm1.evt.en; - break; default: val = 0; break; @@ -456,6 +439,7 @@ static int piix4_pm_initfn(PCIDevice *dev) memory_region_init_io(&s->io, &pm_io_ops, s, "piix4-pm", 64); acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io); + acpi_pm1_evt_init(&s->ar, pm_tmr_timer, &s->io); acpi_pm1_cnt_init(&s->ar, &s->io); acpi_gpe_init(&s->ar, GPE_LEN); diff --git a/hw/vt82c686.c b/hw/vt82c686.c index b8f9c19..86ff7f9 100644 --- a/hw/vt82c686.c +++ b/hw/vt82c686.c @@ -199,18 +199,8 @@ static void pm_tmr_timer(ACPIREGS *ar) static void pm_ioport_writew(void *opaque, uint32_t addr, uint32_t val) { - VT686PMState *s = opaque; - addr &= 0x0f; switch (addr) { - case 0x00: - acpi_pm1_evt_write_sts(&s->ar, val); - pm_update_sci(s); - break; - case 0x02: - acpi_pm1_evt_write_en(&s->ar, val); - pm_update_sci(s); - break; default: break; } @@ -219,17 +209,10 @@ static void pm_ioport_writew(void *opaque, uint32_t addr, uint32_t val) static uint32_t pm_ioport_readw(void *opaque, uint32_t addr) { - VT686PMState *s = opaque; uint32_t val; addr &= 0x0f; switch (addr) { - case 0x00: - val = acpi_pm1_evt_get_sts(&s->ar); - break; - case 0x02: - val = s->ar.pm1.evt.en; - break; default: val = 0; break; @@ -438,6 +421,7 @@ static int vt82c686b_pm_initfn(PCIDevice *dev) memory_region_init_io(&s->io, &pm_io_ops, s, "vt82c686-pm", 64); acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io); + acpi_pm1_evt_init(&s->ar, pm_tmr_timer, &s->io); acpi_pm1_cnt_init(&s->ar, &s->io); pm_smbus_init(&s->dev.qdev, &s->smb);