From patchwork Thu Nov 22 09:48:00 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Terje Bergstrom X-Patchwork-Id: 201128 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id D1D8F2C0089 for ; Fri, 23 Nov 2012 06:05:16 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755341Ab2KVTEs (ORCPT ); Thu, 22 Nov 2012 14:04:48 -0500 Received: from hqemgate03.nvidia.com ([216.228.121.140]:18954 "EHLO hqemgate03.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754947Ab2KVTEq (ORCPT ); Thu, 22 Nov 2012 14:04:46 -0500 Received: from hqnvupgp05.nvidia.com (Not Verified[216.228.121.13]) by hqemgate03.nvidia.com id ; Thu, 22 Nov 2012 01:47:40 -0800 Received: from hqemhub02.nvidia.com ([172.17.108.22]) by hqnvupgp05.nvidia.com (PGP Universal service); Thu, 22 Nov 2012 01:44:40 -0800 X-PGP-Universal: processed; by hqnvupgp05.nvidia.com on Thu, 22 Nov 2012 01:44:40 -0800 Received: from tbergstrom-desktop.Nvidia.com (172.20.144.16) by hqemhub02.nvidia.com (172.20.150.31) with Microsoft SMTP Server (TLS) id 8.3.279.1; Thu, 22 Nov 2012 01:44:39 -0800 From: Terje Bergstrom To: , CC: Terje Bergstrom , Arto Merilainen Subject: [PATCH 2/6] ARM: tegra: Add auxiliary data for nvhost Date: Thu, 22 Nov 2012 11:48:00 +0200 Message-ID: <1353577684-7896-3-git-send-email-tbergstrom@nvidia.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1353577684-7896-1-git-send-email-tbergstrom@nvidia.com> References: <1353577684-7896-1-git-send-email-tbergstrom@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Add SoC specific auxiliary data to host1x and gr2d. nvhost uses this data. Change-Id: Idb04b262c8b6432e56cffb6c7ed64cf7ef4545b3 Signed-off-by: Terje Bergstrom Signed-off-by: Arto Merilainen --- arch/arm/mach-tegra/board-dt-tegra20.c | 38 ++++++++++++++++++++++++++++- arch/arm/mach-tegra/board-dt-tegra30.c | 38 ++++++++++++++++++++++++++++- arch/arm/mach-tegra/tegra20_clocks_data.c | 8 +++--- arch/arm/mach-tegra/tegra30_clocks_data.c | 2 ++ 4 files changed, 80 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c index 1d30eac..c695392 100644 --- a/arch/arm/mach-tegra/board-dt-tegra20.c +++ b/arch/arm/mach-tegra/board-dt-tegra20.c @@ -33,6 +33,7 @@ #include #include #include +#include #include #include @@ -45,6 +46,38 @@ #include "common.h" #include "iomap.h" +static const char *host1x_syncpt_names[32] = { + [0] = "gfx_host", + [NVSYNCPT_2D_0] = "2d_0", + [NVSYNCPT_2D_1] = "2d_1", + [NVSYNCPT_VBLANK0] = "vblank0", + [NVSYNCPT_VBLANK1] = "vblank1", +}; + +static struct host1x_device_info host1x_info = { + .nb_channels = 8, + .nb_pts = 32, + .nb_mlocks = 16, + .nb_bases = 8, + .syncpt_names = host1x_syncpt_names, + .client_managed = NVSYNCPTS_CLIENT_MANAGED, +}; + +static struct nvhost_device_data tegra_host1x_info = { + .clocks = { {"host1x", UINT_MAX} }, + NVHOST_MODULE_NO_POWERGATE_IDS, + .private_data = &host1x_info, +}; + +static struct nvhost_device_data tegra_gr2d_info = { + .index = 2, + .syncpts = BIT(NVSYNCPT_2D_0) | BIT(NVSYNCPT_2D_1), + .clocks = { {"gr2d", UINT_MAX, true}, {"epp", UINT_MAX, true} }, + NVHOST_MODULE_NO_POWERGATE_IDS, + .clockgate_delay = 0, + .serialize = true, +}; + struct tegra_ehci_platform_data tegra_ehci1_pdata = { .operating_mode = TEGRA_USB_OTG, .power_down_on_bus_suspend = 1, @@ -94,13 +127,16 @@ struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000D600, "spi_tegra.1", NULL), OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000D800, "spi_tegra.2", NULL), OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000DA00, "spi_tegra.3", NULL), - OF_DEV_AUXDATA("nvidia,tegra20-host1x", 0x50000000, "host1x", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-host1x", 0x50000000, "host1x", + &tegra_host1x_info), OF_DEV_AUXDATA("nvidia,tegra20-dc", 0x54200000, "tegradc.0", NULL), OF_DEV_AUXDATA("nvidia,tegra20-dc", 0x54240000, "tegradc.1", NULL), OF_DEV_AUXDATA("nvidia,tegra20-hdmi", 0x54280000, "hdmi", NULL), OF_DEV_AUXDATA("nvidia,tegra20-dsi", 0x54300000, "dsi", NULL), OF_DEV_AUXDATA("nvidia,tegra20-tvo", 0x542c0000, "tvo", NULL), OF_DEV_AUXDATA("nvidia,tegra20-nand", 0x70008000, "tegra-nand", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-gr2d", 0x54140000, "tegra-gr2d", + &tegra_gr2d_info), {} }; diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c b/arch/arm/mach-tegra/board-dt-tegra30.c index 6497d12..1afa68b 100644 --- a/arch/arm/mach-tegra/board-dt-tegra30.c +++ b/arch/arm/mach-tegra/board-dt-tegra30.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include @@ -38,6 +39,38 @@ #include "common.h" #include "iomap.h" +static const char *host1x_syncpt_names[32] = { + [0] = "gfx_host", + [NVSYNCPT_2D_0] = "2d_0", + [NVSYNCPT_2D_1] = "2d_1", + [NVSYNCPT_VBLANK0] = "vblank0", + [NVSYNCPT_VBLANK1] = "vblank1", +}; + +static struct host1x_device_info host1x_info = { + .nb_channels = 8, + .nb_pts = 32, + .nb_mlocks = 16, + .nb_bases = 8, + .syncpt_names = host1x_syncpt_names, + .client_managed = NVSYNCPTS_CLIENT_MANAGED, +}; + +static struct nvhost_device_data tegra_host1x_info = { + .clocks = { {"host1x", UINT_MAX} }, + NVHOST_MODULE_NO_POWERGATE_IDS, + .private_data = &host1x_info, +}; + +static struct nvhost_device_data tegra_gr2d_info = { + .index = 2, + .syncpts = BIT(NVSYNCPT_2D_0) | BIT(NVSYNCPT_2D_1), + .clocks = { {"gr2d", UINT_MAX, true}, {"epp", UINT_MAX, true} }, + NVHOST_MODULE_NO_POWERGATE_IDS, + .clockgate_delay = 0, + .serialize = true, +}; + struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000000, "sdhci-tegra.0", NULL), OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000200, "sdhci-tegra.1", NULL), @@ -57,12 +90,15 @@ struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DA00, "spi_tegra.3", NULL), OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DC00, "spi_tegra.4", NULL), OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DE00, "spi_tegra.5", NULL), - OF_DEV_AUXDATA("nvidia,tegra30-host1x", 0x50000000, "host1x", NULL), + OF_DEV_AUXDATA("nvidia,tegra30-host1x", 0x50000000, "host1x", + &tegra_host1x_info), OF_DEV_AUXDATA("nvidia,tegra30-dc", 0x54200000, "tegradc.0", NULL), OF_DEV_AUXDATA("nvidia,tegra30-dc", 0x54240000, "tegradc.1", NULL), OF_DEV_AUXDATA("nvidia,tegra30-hdmi", 0x54280000, "hdmi", NULL), OF_DEV_AUXDATA("nvidia,tegra30-dsi", 0x54300000, "dsi", NULL), OF_DEV_AUXDATA("nvidia,tegra30-tvo", 0x542c0000, "tvo", NULL), + OF_DEV_AUXDATA("nvidia,tegra30-gr2d", 0x54140000, "gr2d", + &tegra_gr2d_info), {} }; diff --git a/arch/arm/mach-tegra/tegra20_clocks_data.c b/arch/arm/mach-tegra/tegra20_clocks_data.c index 7f049ac..3314e50 100644 --- a/arch/arm/mach-tegra/tegra20_clocks_data.c +++ b/arch/arm/mach-tegra/tegra20_clocks_data.c @@ -1041,10 +1041,10 @@ static struct clk_duplicate tegra_clk_duplicates[] = { CLK_DUPLICATE("usbd", "utmip-pad", NULL), CLK_DUPLICATE("usbd", "tegra-ehci.0", NULL), CLK_DUPLICATE("usbd", "tegra-otg", NULL), - CLK_DUPLICATE("2d", "tegra_grhost", "gr2d"), - CLK_DUPLICATE("3d", "tegra_grhost", "gr3d"), - CLK_DUPLICATE("epp", "tegra_grhost", "epp"), - CLK_DUPLICATE("mpe", "tegra_grhost", "mpe"), + CLK_DUPLICATE("2d", NULL, "gr2d"), + CLK_DUPLICATE("3d", NULL, "gr3d"), + CLK_DUPLICATE("epp", NULL, "epp"), + CLK_DUPLICATE("mpe", NULL, "mpe"), CLK_DUPLICATE("cop", "tegra-avp", "cop"), CLK_DUPLICATE("vde", "tegra-aes", "vde"), CLK_DUPLICATE("cclk", NULL, "cpu"), diff --git a/arch/arm/mach-tegra/tegra30_clocks_data.c b/arch/arm/mach-tegra/tegra30_clocks_data.c index 6942c7a..f30bd54 100644 --- a/arch/arm/mach-tegra/tegra30_clocks_data.c +++ b/arch/arm/mach-tegra/tegra30_clocks_data.c @@ -1338,6 +1338,8 @@ struct clk_duplicate tegra_clk_duplicates[] = { CLK_DUPLICATE("pll_p", "tegradc.0", "parent"), CLK_DUPLICATE("pll_p", "tegradc.1", "parent"), CLK_DUPLICATE("pll_d2_out0", "hdmi", "parent"), + CLK_DUPLICATE("2d", NULL, "gr2d"), + CLK_DUPLICATE("epp", NULL, "epp"), }; struct clk *tegra_ptr_clks[] = {