Patchwork [Quantal,SRU,1/1] e1000e: add device IDs for i218

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Submitter Leann Ogasawara
Date Nov. 22, 2012, midnight
Message ID <810b224d4f6543e915810bee4a11adc88a824ab4.1353534658.git.leann.ogasawara@canonical.com>
Download mbox | patch
Permalink /patch/200886/
State New
Headers show

Comments

Leann Ogasawara - Nov. 22, 2012, midnight
From: Bruce Allan <bruce.w.allan@intel.com>

BugLink: http://bugs.launchpad.net/bugs/1081796

i218 is the next-generation LOM that will be available on systems with the
Lynx Point LP Platform Controller Hub (PCH) chipset from Intel.  This patch
provides the initial support of those devices.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
(cherry picked from commit 16e310ae6ed352c4963b1f2413fcd88fa693eeda)

Signed-off-by: Leann Ogasawara <leann.ogasawara@canonical.com>
---
 drivers/net/ethernet/intel/e1000e/hw.h     |    2 ++
 drivers/net/ethernet/intel/e1000e/netdev.c |    2 ++
 2 files changed, 4 insertions(+)

Patch

diff --git a/drivers/net/ethernet/intel/e1000e/hw.h b/drivers/net/ethernet/intel/e1000e/hw.h
index ed5b409..d37bfd9 100644
--- a/drivers/net/ethernet/intel/e1000e/hw.h
+++ b/drivers/net/ethernet/intel/e1000e/hw.h
@@ -412,6 +412,8 @@  enum e1e_registers {
 #define E1000_DEV_ID_PCH2_LV_V			0x1503
 #define E1000_DEV_ID_PCH_LPT_I217_LM		0x153A
 #define E1000_DEV_ID_PCH_LPT_I217_V		0x153B
+#define E1000_DEV_ID_PCH_LPTLP_I218_LM		0x155A
+#define E1000_DEV_ID_PCH_LPTLP_I218_V		0x1559
 
 #define E1000_REVISION_4 4
 
diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c
index 8e89867..e8ef4df 100644
--- a/drivers/net/ethernet/intel/e1000e/netdev.c
+++ b/drivers/net/ethernet/intel/e1000e/netdev.c
@@ -6562,6 +6562,8 @@  static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
 
 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
+	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
+	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
 
 	{ 0, 0, 0, 0, 0, 0, 0 }	/* terminate list */
 };