[U-Boot,1/2] ARM: cache: introduce weak arm_setup_identity_mapping

Submitted by Vincent Stehlé on Nov. 20, 2012, 11:01 a.m.

Details

Message ID 1353409267-19451-2-git-send-email-v-stehle@ti.com
State Superseded
Delegated to: Tom Rini
Headers show

Commit Message

Vincent Stehlé Nov. 20, 2012, 11:01 a.m.
Separate the MMU identity mapping for ARM in a weak function, to allow
redefinition with platform specific function.

This is motivated by the need to unmap the region near address zero on HS OMAP
devices, to avoid speculative accesses. Accessing this region causes security
violations, which we want to avoid.

Signed-off-by: Vincent Stehlé <v-stehle@ti.com>
---
 arch/arm/lib/cache-cp15.c |   19 ++++++++++++++++---
 1 file changed, 16 insertions(+), 3 deletions(-)

Patch hide | download patch | download mbox

diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index 939de10..0b87d93 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -23,6 +23,7 @@ 
 
 #include <common.h>
 #include <asm/system.h>
+#include <linux/compiler.h>
 
 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
 
@@ -40,6 +41,17 @@  void __arm_init_before_mmu(void)
 void arm_init_before_mmu(void)
 	__attribute__((weak, alias("__arm_init_before_mmu")));
 
+void __arm_setup_identity_mapping(u32 *page_table)
+{
+	int i;
+
+	/* Set up an identity-mapping for all 4GB, rw for everyone */
+	for (i = 0; i < 4096; i++)
+		page_table[i] = i << 20 | (3 << 10) | 0x12;
+}
+__weak void arm_setup_identity_mapping(u32 *page_table)
+	__attribute__((alias("__arm_setup_identity_mapping")));
+
 static void cp_delay (void)
 {
 	volatile int i;
@@ -72,9 +84,10 @@  static inline void mmu_setup(void)
 	u32 reg;
 
 	arm_init_before_mmu();
-	/* Set up an identity-mapping for all 4GB, rw for everyone */
-	for (i = 0; i < 4096; i++)
-		page_table[i] = i << 20 | (3 << 10) | 0x12;
+
+	/* Set up an identity-mapping. Default version maps all 4GB rw for
+	 * everyone */
+	arm_setup_identity_mapping(page_table);
 
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 		dram_bank_mmu_setup(i);