Patchwork [1/1] arm: tegra: select correct parent clk for pll_p

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Submitter Sivaram Nair
Date Nov. 20, 2012, 7:29 a.m.
Message ID <1353396556-7738-1-git-send-email-sivaramn@nvidia.com>
Download mbox | patch
Permalink /patch/200239/
State Accepted, archived
Headers show

Comments

Sivaram Nair - Nov. 20, 2012, 7:29 a.m.
For Tegra30, pll_p clk's parent is wrongly specified as clk_m instead of
pll_ref in the tegra30_clk_init_table and this is resulting in a
boot-time warning. This patch fixes this by correcting the clk init
table.

Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
---
 arch/arm/mach-tegra/common.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
Stephen Warren - Nov. 26, 2012, 9 p.m.
On 11/20/2012 12:29 AM, Sivaram Nair wrote:
> For Tegra30, pll_p clk's parent is wrongly specified as clk_m instead of
> pll_ref in the tegra30_clk_init_table and this is resulting in a
> boot-time warning. This patch fixes this by correcting the clk init
> table.

Thanks, applied.

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Patch

diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 0816562..d54cfc5 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -104,7 +104,7 @@  static __initdata struct tegra_clk_init_table tegra20_clk_init_table[] = {
 static __initdata struct tegra_clk_init_table tegra30_clk_init_table[] = {
 	/* name		parent		rate		enabled */
 	{ "clk_m",	NULL,		0,		true },
-	{ "pll_p",	"clk_m",	408000000,	true },
+	{ "pll_p",	"pll_ref",	408000000,	true },
 	{ "pll_p_out1",	"pll_p",	9600000,	true },
 	{ "pll_p_out4",	"pll_p",	102000000,	true },
 	{ "sclk",	"pll_p_out4",	102000000,	true },