From patchwork Mon Nov 19 14:59:33 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Vincent_Stehl=C3=A9?= X-Patchwork-Id: 200024 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id BBA102C00F3 for ; Tue, 20 Nov 2012 02:00:18 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 542704A046; Mon, 19 Nov 2012 16:00:09 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id msd5jAhnHFIh; Mon, 19 Nov 2012 16:00:09 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3D9D04A047; Mon, 19 Nov 2012 15:59:56 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id ABD864A033 for ; Mon, 19 Nov 2012 15:59:51 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id MRxIf4G191+H for ; Mon, 19 Nov 2012 15:59:50 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from bear.ext.ti.com (bear.ext.ti.com [192.94.94.41]) by theia.denx.de (Postfix) with ESMTPS id 4BEF04A03C for ; Mon, 19 Nov 2012 15:59:48 +0100 (CET) Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id qAJExdcj010413; Mon, 19 Nov 2012 08:59:40 -0600 Received: from DLEE74.ent.ti.com (dlee74.ent.ti.com [157.170.170.8]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id qAJExd1u026301; Mon, 19 Nov 2012 08:59:39 -0600 Received: from dlelxv23.itg.ti.com (172.17.1.198) by DLEE74.ent.ti.com (157.170.170.8) with Microsoft SMTP Server id 14.1.323.3; Mon, 19 Nov 2012 08:59:39 -0600 Received: from svrhermes.tif.ti.com (svrhermes.tif.ti.com [137.167.130.169]) by dlelxv23.itg.ti.com (8.13.8/8.13.8) with ESMTP id qAJExdmw030140; Mon, 19 Nov 2012 08:59:39 -0600 Received: from unb0919505.tif.ti.com (unb0919505.tif.ti.com [137.167.100.142]) by svrhermes.tif.ti.com (Postfix) with ESMTP id BCAB837068; Mon, 19 Nov 2012 15:59:38 +0100 (MET) Received: from vstehle by unb0919505.tif.ti.com with local (Exim 4.76) (envelope-from ) id 1TaSp0-0002ah-2d; Mon, 19 Nov 2012 15:59:38 +0100 From: =?UTF-8?q?Vincent=20Stehl=C3=A9?= To: Date: Mon, 19 Nov 2012 15:59:33 +0100 Message-ID: <1353337174-9858-2-git-send-email-v-stehle@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1353337174-9858-1-git-send-email-v-stehle@ti.com> References: <20121116215251.471c148a@lilith> <1353337174-9858-1-git-send-email-v-stehle@ti.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 1/2] ARM: cache: introduce weak arm_setup_identity_mapping X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Separate the MMU identity mapping for ARM in a weak function, to allow redefinition with platform specific function. This is motivated by the need to unmap the region near address zero on HS OMAP devices, to avoid speculative accesses. Accessing this region causes security violations, which we want to avoid. Signed-off-by: Vincent Stehlé --- arch/arm/lib/cache-cp15.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index 939de10..886fe5c 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -40,6 +40,17 @@ void __arm_init_before_mmu(void) void arm_init_before_mmu(void) __attribute__((weak, alias("__arm_init_before_mmu"))); +void __arm_setup_identity_mapping(u32 *page_table) +{ + int i; + + /* Set up an identity-mapping for all 4GB, rw for everyone */ + for (i = 0; i < 4096; i++) + page_table[i] = i << 20 | (3 << 10) | 0x12; +} +void arm_setup_identity_mapping(u32 *page_table) + __attribute__((weak, alias("__arm_setup_identity_mapping"))); + static void cp_delay (void) { volatile int i; @@ -72,9 +83,10 @@ static inline void mmu_setup(void) u32 reg; arm_init_before_mmu(); - /* Set up an identity-mapping for all 4GB, rw for everyone */ - for (i = 0; i < 4096; i++) - page_table[i] = i << 20 | (3 << 10) | 0x12; + + /* Set up an identity-mapping. Default version maps all 4GB rw for + * everyone */ + arm_setup_identity_mapping(page_table); for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { dram_bank_mmu_setup(i);