| Submitter | Stephen Warren |
|---|---|
| Date | Nov. 16, 2012, 7:43 p.m. |
| Message ID | <1353095038-20031-2-git-send-email-swarren@wwwdotorg.org> |
| Download | mbox |
| Permalink | /patch/199975/ |
| State | New |
| Headers | show
Return-Path: <linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org> X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 473B72C009F for <incoming-imx@patchwork.ozlabs.org>; Mon, 19 Nov 2012 21:41:04 +1100 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TaOjq-0008Nv-Ax; Mon, 19 Nov 2012 10:38:02 +0000 Received: from avon.wwwdotorg.org ([2001:470:1f0f:bd7::2]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TZRpe-0001sE-Dp for linux-arm-kernel@lists.infradead.org; Fri, 16 Nov 2012 19:44:07 +0000 Received: from severn.wwwdotorg.org (unknown [192.168.65.5]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by avon.wwwdotorg.org (Postfix) with ESMTPS id CB0B46253; Fri, 16 Nov 2012 12:45:25 -0700 (MST) Received: from swarren-lx1.nvidia.com (localhost [127.0.0.1]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by severn.wwwdotorg.org (Postfix) with ESMTPSA id B6404E479A; Fri, 16 Nov 2012 12:44:04 -0700 (MST) From: Stephen Warren <swarren@wwwdotorg.org> To: arm@kernel.org Subject: [GIT PULL 2/6] ARM: tegra: core SoC code enhancements Date: Fri, 16 Nov 2012 12:43:54 -0700 Message-Id: <1353095038-20031-2-git-send-email-swarren@wwwdotorg.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1353095038-20031-1-git-send-email-swarren@wwwdotorg.org> References: <1353095038-20031-1-git-send-email-swarren@wwwdotorg.org> X-NVConfidentiality: public X-Virus-Scanned: clamav-milter 0.96.5 at avon.wwwdotorg.org X-Virus-Status: Clean X-Bad-Reply: References and In-Reply-To but no 'Re:' in Subject. X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121116_144406_678696_655B938B X-CRM114-Status: GOOD ( 12.94 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-Mailman-Approved-At: Mon, 19 Nov 2012 05:36:51 -0500 Cc: linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Stephen Warren <swarren@wwwdotorg.org> X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Unsubscribe: <http://lists.infradead.org/mailman/options/linux-arm-kernel>, <mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe> List-Archive: <http://lists.infradead.org/pipermail/linux-arm-kernel/> List-Post: <mailto:linux-arm-kernel@lists.infradead.org> List-Help: <mailto:linux-arm-kernel-request@lists.infradead.org?subject=help> List-Subscribe: <http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>, <mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org |
Various small clock initialization table and driver changes to support WiFi modules, SPI controllers, and host1x (graphics/display hardware). Various AHB/APB-related clocks were added to the Tegra30 clock driver. The level 2 cache initialization is now driven by data from device tree, and the cache configuration tweaked. AUXDATA is added to support SPI controllers and host1x. Code to decode Tegra's "speedo" process identification fuses is added. This pull request is based on tegra-for-3.8-cleanup. ---------------------------------------------------------------- The following changes since commit bb1de8877c960b3b3e1c8337730df970b262fd44: ARM: tegra: move irammap.h to mach-tegra are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra.git tegra-for-3.8-soc for you to fetch changes up to d1d3b978f67c2c000f9d91387cffa630e738d529: ARM: tegra: Add Tegra30 host1x clock support ---------------------------------------------------------------- Danny Huang (3): ARM: tegra: flexible spare fuse read function ARM: tegra: Add speedo-based process identification ARM: tegra: Tegra30 speedo-based process identification Joseph Lo (4): ARM: tegra30: clocks: add AHB and APB clocks ARM: tegra: dt: add L2 cache controller ARM: tegra: common: using OF api for L2 cache init ARM: tegra: enable data prefetch on L2 Laxman Dewangan (2): ARM: tegra: Add OF_DEV_AUXDATA for SLINK driver in board dt ARM: tegra: Add OF_DEV_AUXDATA for sflash driver in board dt Peter De Schrijver (1): ARM: tegra: Implement 6395/1 for Tegra Thierry Reding (4): ARM: tegra: Add AUXDATA for Tegra20 host1x ARM: tegra: Add Tegra20 host1x clock support ARM: tegra: Add AUXDATA for Tegra30 host1x ARM: tegra: Add Tegra30 host1x clock support Wei Ni (1): ARM: tegra: set up wlan clocks for tegra dt arch/arm/boot/dts/tegra20.dtsi | 9 + arch/arm/boot/dts/tegra30.dtsi | 9 + arch/arm/mach-tegra/Makefile | 2 + arch/arm/mach-tegra/board-dt-tegra20.c | 23 ++ arch/arm/mach-tegra/board-dt-tegra30.c | 25 ++ arch/arm/mach-tegra/common.c | 17 +- arch/arm/mach-tegra/fuse.c | 49 +++- arch/arm/mach-tegra/fuse.h | 16 ++ arch/arm/mach-tegra/tegra20_clocks_data.c | 11 +- arch/arm/mach-tegra/tegra20_speedo.c | 109 +++++++++ arch/arm/mach-tegra/tegra30_clocks.c | 106 +++++++++ arch/arm/mach-tegra/tegra30_clocks.h | 1 + arch/arm/mach-tegra/tegra30_clocks_data.c | 51 ++++- arch/arm/mach-tegra/tegra30_speedo.c | 292 ++++++++++++++++++++++++ 14 files changed, 696 insertions(+), 24 deletions(-) create mode 100644 arch/arm/mach-tegra/tegra20_speedo.c create mode 100644 arch/arm/mach-tegra/tegra30_speedo.c